Patentable/Patents/US-8125477
US-8125477

Plasma display and driving method thereof

PublishedFebruary 28, 2012
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

In a plasma display, a drain of a first transistor is connected to a scan electrode, and a source of the first transistor is connected to a power source supplying a first voltage. First and the second resistors are connected in series with the scan electrode and the power source. A scan electrode driver turns on the first transistor during a reset period to decrease a voltage of the scan electrode. A scan electrode driver senses the voltage of the electrode from a voltage divided by first and second resistors connected in series between the electrode and the power source. Upon the voltage of the scan electrode becoming a second voltage which is higher than the first voltage, the scan electrode driver turns off the first transistor to maintain the voltage of the scan electrode at the second voltage. In an address period, a scan electrode driver supplies the first voltage to the scan electrode of a light emitting cell. At least one resistor of the first and second resistors is a variable resistor in which resistance varies as the temperature of the Plasma Display Panel (PDP) varies, such that the plasma display can perform steady operation.

Patent Claims
20 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A plasma display comprising: a Plasma Display Panel (PDP) including an electrode; a first transistor connected between the electrode and a power source for supplying a first voltage; a first driver for changing a voltage of the electrode by controlling driving of the first transistor; first and second resistors connected in series between the electrode and the power source; and a second transistor turned on in response to a voltage of a junction of the first and second resistors, and the first transistor turned off in response to the voltage of the electrode becoming a second voltage different from the first voltage during a first time period; wherein at least one of the first and the second resistors is a variable resistor having a resistance that varies in accordance with a temperature of the PDP, wherein, upon the first resistor being the variable resistor, the resistance of the first resistor increases as the temperature of the PDP becomes higher; and wherein, upon the second resistor being the variable resistor, the resistance of the second resistor decreases as the temperature of the PDP becomes higher.

2

2. The device of claim 1 , further comprising a third transistor connected between the electrode and the power source, the third transistor being turned on during a second time period that follows the first time period to supply the first voltage to the electrode.

3

3. The device of claim 1 , further comprising a control signal voltage source to supply a control signal to the control terminal of the first transistor to turn on the first transistor during a falling period of the first time period.

4

4. The device of claim 2 , wherein a reset period comprises the first time period, an address period comprises the second time period, and the first voltage is supplied to the electrode of a cell to be turned on during the address period.

5

5. The device of claim 3 , wherein a reset period comprises the first time period, an address period comprises the second time period, and the first voltage is supplied to the electrode of the cell to be turned on during the address period.

6

6. The device of claim 2 , wherein the first transistor is an N-channel transistor with a first terminal connected to the electrode and a second terminal connected to the power source.

7

7. The device of claim 3 , wherein the first transistor is an N-channel transistor with a first terminal connected to the electrode and a second terminal connected to the power source.

8

8. The device of claim 2 , wherein the first driver controls the first transistor to gradually vary the electrode voltage.

9

9. The device of claim 3 , wherein the first driver controls the first transistor to gradually vary the electrode voltage.

10

10. A method of driving a plasma display including an electrode, the method comprising: turning on a first transistor connected between the electrode and a power source to open a path between the electrode and the power source to supply a first voltage to vary a voltage of the electrode during a first time period; sensing the voltage of the electrode from a voltage divided by a plurality of resistors connected in series between the electrode and the power source; cutting off the path between the electrode and the power source upon the voltage of the electrode becoming a second voltage that is different from the first voltage; maintaining the voltage of the electrode at the second voltage during a second time period; and supplying the first voltage to the first electrode during a third time period; wherein at least one resistor from among the plurality of resistors is a variable resistor having a resistance that varies according to a temperature of the plasma display.

11

11. The method of claim 10 , wherein the resistance of the at least one resistor is varied in an increasing direction in response to an absolute value of a difference between the first voltage and the second voltage being increased as the temperature of the plasma display becomes higher.

12

12. The method of claim 11 , wherein the first voltage is lower than the second voltage.

13

13. The method of claim 12 , wherein a reset period comprises the first and second time periods, an address period comprises the third time period, and the first voltage is a voltage supplied to the electrode of the cell to be turned on during the address period.

14

14. The method of claim 12 , wherein the maintaining the voltage of the electrode at the second voltage during the second time period comprises turning on a second transistor connected between the control terminal of the first transistor and the power source, the second transistor turning off the first transistor upon the second transistor being turned on.

15

15. The method of claim 14 , wherein the supplying the first voltage to the electrode during the third time period comprises turning on a third transistor that is connected between the electrode and the power source.

16

16. The method of 14 , wherein the cutting off of the path between the electrode and the power source during the second time period comprises supplying a control signal to the control terminal of the first transistor to turn on of the first transistor.

17

17. The method of claim 10 , wherein the sensing the voltage of the electrode from a voltage divided by a plurality of resistors connected in series between the electrode and the power source is achieved by having the voltage divided by the plurality of resistors input to a control terminal of the second transistor.

18

18. A plasma display, comprising: a Plasma Display Panel (PDP) including an electrode; a first transistor connected between the electrode and a power source for supplying a first voltage; a first driver for changing a voltage of the electrode by controlling driving of the first transistor; first and second resistors connected in series between the electrode and the power source; and a second transistor that turns on in response to a voltage at a junction between the first and second resistors by having a control terminal of the second transistor being connected to the junction between the first and second resistors, the second transistor to turn off the first transistor in response to the voltage of the electrode becoming a second voltage that is different from the first voltage during a first time period; wherein at least one of the first and the second resistors is a variable resistor having a resistance that varies in accordance with a temperature of the PDP.

19

19. The device of claim 18 , wherein the first voltage is lower than the second voltage, the electrode being a scan (Y) electrode.

20

20. The plasma display of claim 1 , the second transistor being connected between a control terminal of the first transistor and the power source.

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Patent Metadata

Filing Date

July 24, 2008

Publication Date

February 28, 2012

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