A board adapted to mount an electronic device includes an insulating resin layer, a wiring layer of a predetermined pattern provided on one surface of the insulating resin layer, a bump electrode provided on an insulating-resin-layer-side surface of the wiring layer, and a covering, formed of a metal layer, which covers a top surface of the bump electrode and a region, at a side surface of the bump electrode, continuous with the top surface excluding a region in contact with the wiring layer.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A board adapted to mount an electronic device, comprising: an insulating resin layer; a wiring layer provided on one surface of said insulating resin layer; a bump electrode formed so as to be integrated with the wiring layer, provided on an insulating-resin-layer-side surface of said wiring layer in an extension from the insulating-resin-layer-side surface of said wiring layer, and embedded in the insulating resin layer; and a covering, formed of a metal layer, which covers a top surface of said bump electrode and a region, at a side surface thereof, continuous with the top surface thereof excluding a region in contact with said wiring layer.
2. The board according to claim 1 , further comprising another covering, formed of a metal layer, which is discontinuous across said covering and at least covers a part, extending from a base, including the base at which the side surface of said bump electrode is in contact with the surface of said wiring layer.
3. The board according to claim 1 , wherein the metal layer has a yield stress which is greater than 40% of the yield stress of said bump electrode and less than or equal to 100% of that of said bump electrode.
4. The board according to claim 1 , wherein the metal layer has a yield stress which is greater than or equal to 50% of the yield stress of said bump electrode and less than or equal to 75% of that of said bump electrode, and said covering covers a region occupying less than or equal to one half of the height of said bump electrode from the top surface thereof to a surface of said wiring layer at a side thereof where said bump electrode is provided.
5. A semiconductor module, comprising: a board according to claim 1 ; a semiconductor device including an element electrode disposed counter to the bump electrode of said board; and the insulating resin layer provided between the wiring layer and said semiconductor device, wherein the bump electrode penetrates said insulating resin layer, and the bump electrode and the element electrode are electrically connected to each other.
6. A semiconductor module according to claim 5 , wherein said insulating resin layer develops plastic flow when pressurized.
7. A portable device which mounts a semiconductor module according to claim 5 .
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
November 7, 2008
March 6, 2012
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