Selectively powered data interfaces

1. An apparatus including a plurality of separately powered electrical circuits, comprising: a plurality of electrical circuits, wherein each electrical circuit includes one or more power inputs; a plurality of power switch circuits, wherein each power switch circuit includes a control input and includes a power output connected to a distinct one of the power inputs of the electrical circuits; one or more isolator circuits, each isolator circuit including a control input, a data input, and a data output; and a controller circuit; wherein the controller circuit is configured to send an enable signal to the control input of each of the power switch circuits whose power output is connected to a selected one of the electrical circuits; wherein the controller circuit is configured to send a disable signal to the control input of each of the other power switch circuits; wherein a first one of the electrical circuits includes one or more data inputs respectively connected to the data output of a respective one of the isolator circuits; and wherein the controller circuit is configured to send an isolator enable signal to the control input of each of the isolator circuits while it sends said enable signal to each of the plurality of power switch circuits connected to said one electrical circuit and to send an isolator disable signal to the control input of each of the isolator circuits while it sends said disable signal to each of the plurality of power switch circuits connected to said one electrical circuit.

2. The apparatus of claim 1 , further comprising: one or more power sources; wherein each of the plurality of power switch circuits further comprises a power input configured to receive power from one of the power sources; and wherein each of the plurality of power switch circuits enables or disables a flow of electrical power from its power input to its power output in response to whether its control input receives said enable signal or said disable signal, respectively.

3. The apparatus of claim 1 , wherein: the apparatus is configured to receive electrical power from a host electrical device external to the apparatus; and after the controller circuit sends said enable signal, the controller circuit continues sending said enable signal to the control input of each of the power switch circuits whose power output is connected to said selected one of the electrical circuits, and continues sending said disable signal to the control input of each of the other power switch circuits, as long as the apparatus receives electrical power from the host electrical device without interruption.

4. The apparatus of claim 3 , wherein: the controller circuit sends said enable signal in response to the apparatus receiving power from said host electrical device.

5. The apparatus of claim 1 , wherein each electrical circuit is a data interface circuit configured to communicate data in accordance with a distinct data interface protocol.

6. The apparatus of claim 1 , further comprising: one or more interface ports; wherein each electrical circuit is a data interface circuit; and wherein each interface port is configured to communicate data with one of the data interface circuits.

7. The apparatus of claim 6 , further comprising: a non-volatile memory; and a memory controller connected between the non-volatile memory and at least one of the data interface circuits.

8. The apparatus of claim 1 , wherein: each isolator circuit, in response to receiving said isolator enable signal, couples its data input to its data output; and each isolator circuit, in response to receiving said isolator disable signal, disconnects its data input from its data output and sets its data output to zero volts.

9. An apparatus including a plurality of separately powered electrical circuits, comprising: a plurality of electrical circuits, wherein each electrical circuit includes one or more power inputs; a plurality of power switch circuits, wherein each power switch circuit includes a control input and includes a power output connected to a distinct one of the power inputs of the electrical circuits; one or more isolator circuits, the one or more isolator circuits each including an isolator control input, a data input, and a data output; and a controller circuit characterized by a plurality of states of operation that include a plurality of activation states, wherein each respective activation state corresponds to a distinct respective one of said electrical circuits; wherein the controller circuit, when operating in at least one of the activation states, is configured to send at least one signal to at least one of the control inputs so that each of the one or more power switch circuits whose power output is connected to the electrical circuit corresponding to said activation state is enabled and each of the other one or more power switch circuits is disabled; wherein the controller circuit, when operating in the at least one of the activation states, is configured to send at least one isolator signal so that at least one isolator circuit associated with the enabled one or more power switch circuits is enabled and so that at least one isolator circuit associated with the disabled one or more power switch circuits is disabled.

10. The apparatus of claim 9 , wherein the states of operation of the controller circuit further include a state in which the controller circuit sends an enable signal to a plurality of power switch circuits connected to a plurality of said electrical circuits.

11. The apparatus of claim 9 , wherein the states of operation of the controller circuit further include an off state in which the controller circuit sends a disable signal to all of the power switch circuits.

12. The apparatus of claim 9 , further comprising: one or more power sources; wherein each of the plurality of power switch circuits further comprises a power input configured to receive power from the one of the power sources; and wherein each of the plurality of power switch circuits enables or disables a flow of electrical power from its power input to its power output in response to whether its control input receives an enable signal or a disable signal, respectively.

13. The apparatus of claim 9 , wherein: the apparatus is configured to receive electrical power from a host electrical device external to the apparatus; and after the controller circuit begins operating in one of said activation states, the controller circuit continues operating in said one activation state as long as the apparatus receives electrical power from said host electrical device without interruption.

14. The apparatus of claim 13 , wherein: the controller circuit enters said one activation state in response to the apparatus receiving power from said host electrical device.

15. The apparatus of claim 9 , wherein each electrical circuit is a data interface circuit configured to communicate data in accordance with a distinct data interface protocol.

16. The apparatus of claim 9 , further comprising: one or more interface ports; wherein each electrical circuit is a data interface circuit; and wherein each interface port is configured to communicate data with one of the data interface circuits.

17. The apparatus of claim 9 , wherein: each isolator circuit, in response to receiving an isolator enable signal, couples its data input to its data output; and each isolator circuit, in response to receiving an isolator disable signal, disconnects its data input from its data output and sets its data output to zero volts.

18. The apparatus of claim 9 , wherein: the controller circuit further comprises an ID logic circuit that stores an ID value that identifies which one of the activation states currently is selected by the ID logic circuit; and the controller circuit reads the value stored in the ID logic circuit and then, in response to said ID value, operates in the activation state identified by said ID value.

19. The apparatus of claim 18 , wherein the ID logic circuit comprises a pattern of open or closed circuits permanently established in the apparatus, wherein said pattern represents the ID value.

20. The apparatus of claim 18 , wherein the ID logic circuit comprises one or more flip-flops characterized by a state, and wherein the respective states of the flip-flops collectively represent the ID value.

21. An apparatus configured to communicate with a host electrical device external to the apparatus, comprising: a plurality of host interface circuits, wherein each host interface circuit includes one or more power inputs; a plurality of power switch circuits, wherein each power switch circuit includes: (i) a control input; (ii) a power input configured to receive power from a host electrical device external to the apparatus, and (iii) a power output connected to a distinct one of the power inputs of the host interface circuits; one or more isolator circuits, wherein each isolator circuit includes: (i) an isolator control input; (ii) a data input; and (iii) a data output; and a controller circuit that is configured to: send an enable signal to the control input of each of the power switch circuits whose power output is connected to a selected one of the host interface circuits; send a disable signal to the control input of each of the other power switch circuits; send an isolator enable signal to the control input of each of the isolator circuits while it sends said enable signal to each of the plurality of power switch circuits connected to said one electrical circuit; and send an isolator disable signal to the control input of each of the isolator circuits while it sends said disable signal to each of the plurality of power switch circuits connected to said one electrical circuit.

22. The apparatus of claim 21 , further comprising: an interface port configured to be connected to a power output of a host electrical device external to the apparatus; wherein the interface port is connected to the power input of one of the power switch circuits.

23. The apparatus of claim 21 , further comprising: an interface port configured to be connected to a power output of a host electrical device external to the apparatus; and a voltage regulator connected between the interface port and the power input of one of the power switch circuits.

24. The apparatus of claim 21 , further comprising: a plurality of interface ports, wherein each interface port is configured to connect to a host electrical device external to the apparatus; wherein each interface port is configured to communicate data with one of the host interface circuits.

25. The apparatus of claim 21 , wherein: after the controller circuit sends said enable signal, the controller circuit is configured to continue sending said enable signal to the control input of each of the power switch circuits whose power output is connected to said selected one of the host interface circuits, and is configured to continue sending said disable signal to the control input of each of the other power switch circuits, as long as the apparatus receives electrical power from a host electrical device without interruption.

26. The apparatus of claim 25 , wherein: the controller circuit is configured to send said enable signal in response to the apparatus receiving power from said host electrical device.

27. A non-volatile memory peripheral device, comprising: a plurality of host interface circuits, wherein each host interface circuit includes one or more power inputs; a plurality of power switch circuits, wherein each power switch circuit includes: (i) a control input; (ii) a power input configured to receive power from a host electrical device external to the apparatus, and (iii) a power output connected to a distinct one of the power inputs of the host interface circuits; one or more isolator circuits, wherein each isolator circuit includes: (i) an isolator control input; (ii) a data input; and (iii) a data output; a controller circuit configured to send an enable signal to the control input of each of the power switch circuits whose power output is connected to a selected one of the host interface circuits, configured to send a disable signal to the control input of each of the other power switch circuits, configured to send an isolator enable signal to the control input of each of the isolator circuits at least partly while it sends said enable signal, and configured to send an isolator disable signal to the control input of each of the isolator circuits at least partly while it sends said disable signal; a non-volatile memory; and a memory controller connected between the non-volatile memory and at least one of the host interface circuits.

28. The non-volatile memory peripheral device of claim 27 , further comprising: a plurality of interface ports, wherein each interface port is configured to connect to a host electrical device external to the apparatus; wherein each interface port is configured to communicate data with one of the host interface circuits.

29. The non-volatile memory peripheral device of claim 27 , wherein each host interface circuit is configured to communicate data in accordance with a distinct data interface protocol.

30. The non-volatile memory peripheral device of claim 27 , wherein: after the controller circuit sends said enable signal, the controller circuit is configured to continue sending said enable signal to the control input of each of the power switch circuits whose power output is connected to said selected one of the host interface circuits, and is configured to continue sending said disable signal to the control input of each of the other power switch circuits, as long as the apparatus receives electrical power from a host electrical device without interruption.

31. The non-volatile memory peripheral device of claim 30 , wherein: the controller circuit is configured to send said enable signal in response to the apparatus receiving power from said host electrical device.

32. An apparatus providing isolation between first and second electrical circuits, comprising: first and second circuits, wherein the first circuit includes a number of data inputs, and wherein the second circuit includes said number of data outputs; said number of isolator circuits, wherein each respective isolator circuit includes a control input, a data output connected to a respective data input of the first circuit, and a data input connected to a respective data output of the second circuit; and a power switch circuit having a control input and a power output; wherein each isolator circuit, in response to receiving an enable signal at its control input, is configured to couple its data input to its data output; wherein each isolator circuit, in response to receiving a disable signal at its control input, is configured to disconnect its data input from its data output and sets its data output to zero volts; wherein the first electrical circuit includes a power input connected to the power output of the power switch circuit; and wherein the power switch circuit, in response to a signal received at its control input, is configured to selectably enable and disable a supply of electrical power to the power input of the first electrical circuit.

33. The apparatus of claim 32 , further comprising: a controller circuit; wherein the controller is configured to selectably either send an enable signal to the control input of the power switch circuit and to the control input of each of the isolator circuits, or else send a disable signal to the control input of the power switch circuit and to the control input of each of the isolator circuits.

34. A method of receiving electrical power from, and transferring data with, a host electrical device external to an apparatus, the apparatus comprising: a plurality of electrical circuits, wherein each electrical circuit includes one or more power inputs; a plurality of power switch circuits, wherein each power switch circuit includes a control input and includes a power output connected to a distinct one of the power inputs of the electrical circuits; one or more isolator circuits, the one or more isolator circuits each including an isolator control input, a data input, and a data output; and a controller, the method comprising: receiving electrical power from the host electrical device; sending the electrical power to at least one of the plurality of power switch circuits; sending, by the controller, at least one signal to at least one of the control inputs so that each of the one or more power switch circuits, whose power output comprises at least a part of the electrical power and is connected to at least one of the electrical circuits, is enabled and each of the other one or more power switch circuits is disabled; and sending, by the controller, at least one isolator signal so that at least one isolator circuit associated with the enabled one or more power switch circuits is enabled and so that at least one isolator circuit associated with the disabled one or more power switch circuits is disabled.

35. The method of claim 34 , wherein the controller sends an enable signal to the control input of each of the power switch circuits whose power output is connected to the selected one of the electrical circuits; and wherein the controller sends a disable signal to the control input of each of the other power switch circuits.

36. The method of claim 34 , wherein each of the plurality of power switch circuits further comprises a power input configured to receive at least a part of the received electrical power; and further comprising: each power switch circuit enabling or disabling a flow of the at least a part of the received electrical power from its power input to its power output in response to whether its control input receives an enable signal or a disable signal, respectively; and selectively enabling or disabling a supply of the at least a part of the received electrical power from its power input to its power output in response to whether the power control signal received at its power control input has the enable value or the disable value.

37. The method of claim 34 , wherein sending at least one isolator signal comprises: sending, by the controller, an isolator enable signal to the control input of each of the one or more isolator circuits associated with the enabled power switch circuit while the controller sends an enable signal to each of the plurality of power switch circuits connected to the one electrical circuit; and sending, by the controller, an isolator disable signal to the control input of each of the one or more isolator circuits associated with the disabled power switch circuit while the controller sends a disable signal to each of the plurality of power switch circuits connected to the one electrical circuit.

38. The apparatus of claim 9 , further comprising a plurality of interface ports, the interface ports configured to physically connect to another device; and wherein at least some of the isolator circuits are connected between a respective power switch circuit and a respective interface port.

39. The apparatus of claim 38 , wherein other isolator circuits are connected between a respective power switch circuit and the controller.

40. The apparatus of claim 9 , wherein the plurality of electrical circuits each include at least one input; and wherein at least some of the isolator circuits are configured to output a zero voltage signal to a respective at least one input in response to receipt of an isolator disable control signal.

41. The apparatus of claim 40 , wherein the at least one input includes a clock input and a data input; and wherein the at least some of the isolator circuits are configured to output a zero voltage signal to a respective clock input and a respective data input in response to the isolator disable control signal.

42. The apparatus of claim 9 , wherein the plurality of electrical circuits each include at least one input and at least one output; and wherein at least some of the isolator circuits are configured to latch, in response to receipt of an isolator disable control signal, a last value of the at least one input prior to receipt of the isolator disable control signal.

43. The apparatus of claim 9 , wherein the plurality of electrical circuits each include at least one input and at least one output; and wherein at least some of the isolator circuits are configured to selectively output a logic zero or a logic one.

44. The apparatus of claim 9 , wherein the plurality of electrical circuits each are fabricated in a separate power island.

45. The apparatus of claim 9 , wherein one of the plurality of electrical circuits comprises an interface circuit for a secure digital protocol; and wherein another of the plurality of electrical circuits comprises an interface circuit for a memory stick protocol.

46. The apparatus of claim 9 , wherein the controller circuit is configured to control the one or more power switch circuits in order to power multiple of the plurality of electrical circuits.

47. The method of claim 34 , wherein the plurality of electrical circuits each include at least one input; and further comprising outputting, by at least some of the isolator circuits, a zero voltage signal to a respective at least one input in response to receipt of an isolator disable control signal.

48. The method of claim 47 , wherein the at least one input includes a clock input and a data input; and wherein outputting comprising outputting, by the at least some of the isolator circuits, the zero voltage signal to a respective clock input and a respective data input in response to receipt of the isolator disable control signal.

49. The method of claim 34 , wherein the plurality of electrical circuits each include at least one input and at least one output; and further comprising, in response to receipt of an isolator disable control signal, latching a last value of the at least one input prior to receipt of the isolator disable control signal.

50. The method of claim 34 , wherein the plurality of electrical circuits each include at least one input and at least one output; and further comprising, in response to receipt of an isolator disable control signal, selectively outputting by the one or more isolator circuits a logic zero or a logic one.