Disclosed is a method for manufacturing a semiconductor device. The method comprises: forming a resist layer over a substrate; exposing the resist layer to light thereby to form a first exposed pattern and a second exposed pattern on the resist layer, the second exposed pattern being used for forming one or more trenches; contacting the resist layer with a developing solution thereby to form a patterned resist having an opening corresponding to the first exposed pattern and to form one or more trenches corresponding to the second exposed pattern on a surface layer of the patterned resist; and conducting a bake process on the patterned resist.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method for manufacturing a semiconductor device, comprising: forming a resist layer over a substrate; exposing said resist layer to light thereby to form a first exposed pattern and a second exposed pattern on said resist layer, said first exposed pattern being adapted to remove the resist layer from the substrate and said second exposed pattern being adapted to form one or more trenches that are in a surface layer of the resist layer spaced from said first exposed pattern and do not extend to the substrate; contacting said resist layer with a developing solution thereby to remove the resist layer from an opening corresponding to said first exposed pattern to expose the substrate in the opening, and to form said one or more trenches corresponding to said second exposed pattern; and conducting a bake process on said patterned resist.
2. The method for manufacturing the semiconductor device as set forth in claim 1 , further comprising a plurality of said one or more trenches that are parallel to each other.
3. The method for manufacturing the semiconductor device as set forth in claim 1 , further comprising a plurality of said one or more trenches that form a lattice pattern.
4. The method for manufacturing the semiconductor device as set forth in claim 1 , wherein: said first exposed pattern and said second exposed pattern are formed by exposing said resist layer using a reticle, said reticle having a transparent portion, a light shielding portion, and a low light transmittance portion which has an optical transmissivity of light to which said resist layer is exposed lower than that of said transparent portion; and said transparent portion corresponds to said opening, said light shielding portion and said low light transmittance portion correspond to said second exposed pattern, and said low light transmittance portion corresponds to said one or more trenches.
5. The method for manufacturing the semiconductor device as set forth in claim 4 , wherein said low light transmittance portion of said reticle includes a half-tone film.
6. The method for manufacturing the semiconductor device as set forth in claim 5 , wherein said light shielding portion of said reticle includes a laminated structure composed of said half-tone film and another type of half-tone film having an optical transmissivity that is lower than an optical transmissivity of said half-tone film.
7. The method for manufacturing the semiconductor device as set forth in claim 4 , wherein said low light transmittance portion of said reticle includes a light shielding film having a plurality of fine slits, each fine slit having a width smaller than a resolution limit for a photolithographic process.
8. The method for manufacturing the semiconductor device as set forth in claim 1 , wherein: said first exposed pattern and said second exposed pattern are formed by exposing said resist layer using a reticle having a transparent portion, a light shielding portion, and a low light transmittance portion, an optical transmissivity of said low light transmittance portion for light employed in the exposure for said resist layer being lower than that of said transparent portion; and said light shielding portion corresponds to said opening, said transparent portion and said low light transmittance portion correspond to said second exposed pattern, and said low light transmittance portion corresponds to said one or more trenches in said surface layer.
9. The method for manufacturing the semiconductor device as set forth in claim 8 , wherein said low light transmittance portion of said reticle contains a half-tone film.
10. The method for manufacturing the semiconductor device as set forth in claim 9 , wherein said light shielding portion of said reticle includes a laminated structure composed of said half-tone film and another type of half-tone film that has an optical transmissivity lower than an optical transmissivity of said half-tone film.
11. The method for manufacturing the semiconductor device as set forth in claim 9 , wherein said low light transmittance portion of said reticle includes a light shielding film having a plurality of fine slits, each fine slit having a width smaller than a resolution limit for a photolithographic process.
12. The method for manufacturing the semiconductor device as set forth in claim 1 , wherein said step of exposing the resist layer to light to form a first exposed pattern and a second exposed pattern includes: forming said first exposed pattern on said resist layer by exposing said resist layer; and forming said second exposed pattern on said resist layer by exposing said resist layer.
13. The method for manufacturing the semiconductor device as set forth in claim 12 , wherein said step of forming said second exposed pattern is performed by using a reticle which has a pattern for forming said one or more trenches in an entire surface of the reticle.
14. The method for manufacturing the semiconductor device as set forth in claim 12 , wherein: said reticle used in said step of forming the second exposed pattern includes a light shielding portion and a transparent portion; and an amount of light to which said resist layer is exposed in said step of forming the first exposed pattern is smaller than an amount of light to which said resist layer is exposed in said step of forming the second exposed pattern.
15. The method for manufacturing the semiconductor device as set forth in claim 12 , wherein: said reticle used in said step of forming the second exposed pattern includes a light shielding portion and a low light transmittance portion; and said low light transmittance portion includes a half-tone film.
16. The method for manufacturing the semiconductor device as set forth in claim 12 , wherein: said reticle used in said step of forming the second exposed pattern includes a light shielding portion and a low light transmittance portion; and said low light transmittance portion includes a light shielding film having a plurality of fine slits, each fine slit having a width smaller than a resolution limit for a photolithographic process.
17. The method for manufacturing the semiconductor device as set forth in claim 1 , wherein D/d representing a relative height is within a range from 1/10 to ½, where D denotes a depth of said one or more trenches and d denotes a thickness of said resist layer.
18. The method for manufacturing the semiconductor device as set forth in claim 1 , wherein a width of each of said one or more trenches is more than zero and not greater than 10 μm.
19. The method for manufacturing the semiconductor device as set forth in claim 1 , wherein each of said one or more trenches has a substantially V-shaped cross section.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
July 23, 2008
March 20, 2012
Browse 5M+ US patents with plain-English claim translations and AI-generated analysis.