Methods for packaging microelectronic devices, microelectronic workpieces having packaged dies, and microelectronic devices re disclosed herein. One aspect of the invention is directed toward a microelectronic workpiece comprising a substrate having a device side and a backside. In one embodiment, the microelectronic workpiece further includes a plurality of dies formed on the device side of the substrate, a dielectric layer over the dies, and a plurality of bond-pads on the dielectric layer. The dies have integrated circuitry and a plurality of bond-pads electrically coupled to the integrated circuitry. The ball-pads are arranged in ball-pad arrays over corresponding dies on the substrate. The microelectronic workpiece of this embodiment further includes a protective layer over the backside of the substrate. The protective layer is formed on the backside of the substrate from a material that is in a flowable state and is then cured to a non-flowable state.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A semiconductor workpiece for fabricating a plurality of semiconductor devices, comprising: a wafer having a substrate composed of a semiconductor material, the substrate having an active side and a backside; a plurality of dies having integrated circuitry on the active side of the substrate and a plurality of bond-pads electrically coupled to the integrated circuitry; a protective layer formed on the backside of the substrate, wherein the protective layer is a flowable material; a redistribution layer having a dielectric layer formed over the dies, ball-pads arranged in ball-pad arrays corresponding to the dies and traces coupling the bond-pads of a die to the ball-pads of a corresponding ball-pad array wherein the traces are embedded in the dielectric layer and the bond-pads embedded in but not covered by the dielectric layer; a plurality of solder balls on the ball-pads; and a protective film over the dielectric layer and surrounding a portion of the solder balls and covering the ball-pads.
2. The semiconductor workpiece of claim 1 wherein the flowable material is curable to a non-flowable state in an environment at a temperature of approximately 50° C. to 500° C.
3. The semiconductor workpiece of claim 1 wherein the protective layer comprises a polyimide, epoxy-based, and/or modified silicone material.
4. The semiconductor workpiece of claim 1 wherein the integrated circuitry comprises a memory circuit.
5. A microelectronic device, comprising: a substrate having a device side and a backside; a die formed on the device side of the substrate, the die including integrated circuitry and a plurality of bond-pads electrically coupled to the integrated circuitry; a protective layer coating the backside, the protective layer being configured to change from a flowable state to a non-flowable state a redistribution layer having a dielectric layer formed over the die, ball-pads arranged in ball-pad arrays corresponding to the die, and traces coupling the bond-pads of the die to the ball-pads of a corresponding ball-pad array wherein the traces are embedded in the dielectric layer and the ball-pads are embedded in but exposed through the dielectric layer; a plurality of solder balls on the ball-pads; and a protective film over the dielectric layer and surrounding a portion of the solder balls and covering the ball-pads.
6. The microelectronic device of claim 5 wherein the flowable material is curable to a non-flowable state in an environment at a temperature of approximately 50° C. to 500° C.
7. The microelectronic device of claim 5 wherein the protective layer comprises a polyimide, epoxy-based, and/or modified silicone material.
8. The microelectronic device of claim 5 wherein the integrated circuitry comprises a memory circuit.
9. A microelectronic workpiece having a front-side and a backside opposite the front side, the microelectronic workpiece comprising: a die having an integrated circuit; a bond-pad electrically coupled to the integrated circuit; a protective layer formed on the backside of the microelectronic workpiece, wherein the protective layer includes a flowable material; a redistribution layer having a dielectric layer formed over the dies, ball-pads arranged in ball-pad arrays corresponding to the dies, and traces coupling the bond-pads of a die to the ball-pads of a corresponding ball-pad array wherein the traces are embedded in the dielectric layer and the ball-pads are embedded in but exposed through the dielectric layer wherein the bond-pads have a first surface area and a first spacing and the ball-pads have a second surface area and a second spacing and wherein the first surface area and first spacing are smaller than the second surface area and second spacing, respectively; a plurality of solder balls on the ball-pads; and a protective film over the dielectric layer and surrounding a portion of the solder balls and covering the ball-pads.
10. The microelectronic workpiece of claim 9 wherein the flowable material is curable to a non-flowable state in an environment at a temperature of approximately 50° C. to 500° C.
11. The microelectronic workpiece of claim 9 wherein the protective layer comprises a polyimide, epoxy-based, and/or modified silicone material.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
July 12, 2010
April 10, 2012
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