A method for processing an image abnormality caused by power supply is provided, which is used in a digital image-capturing apparatus. The method can be described as follows. First, power of the digital image-capturing apparatus is turned on. Next, a line data of an image being captured is started to be transmitted, wherein the line data has a dummy pixel region and an effective pixel region, and the dummy pixel region is first transmitted, and then a plurality of pixel data of the effective pixel region is transmitted. Next, a horizontal driving current to be input to a horizontal driver is processed, so that the horizontal driving current substantially approaches a stable state before the effective pixel region is output. Finally, the above steps are repeated for continually transmitting a next line data of the image being captured until the image of the digital image-capturing apparatus is completely transmitted.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A circuit for processing an image abnormality caused by power supply, used in a digital image-capturing apparatus, comprising: a digital signal processor (DSP); an analogue front-end (AFE) processing unit, comprising a horizontal driver, and mutually communicated with the DSP, wherein the DSP or the AFE processing unit outputs a pulse-width modulation (PWM) signal; an image-capturing unit, mutually communicated with the DSP, and driven by the horizontal driver; a voltage current regulation unit, at least providing a voltage and a current to the AFE processing unit; a power supply circuit, providing power to the voltage current regulation unit; and a dummy loading device that bears an inrush current noise of the current, connected to an output terminal of the voltage current regulation unit, wherein during a predetermined time section just before a start of transmitting a horizontal shift clock by the AFE to the image-capturing unit, the dummy loading device is set at a turned-on state under control of the PWM signal within the predetermined time section, and the dummy loading device is set at a turned-off state other than the predetermined time section whereby the circuit processes an image abnormality caused by the power supply.
2. The circuit for processing an image abnormality caused by power supply as claimed in claim 1 , wherein the dummy loading device comprising: a load; a semiconductor switch device, connected to the load to form a series circuit, the series circuit having a first terminal being connected to an input terminal of the horizontal driver, and a second terminal being connected to ground, and the semiconductor switch device being controlled by the PWM signal.
3. The circuit for processing an image abnormality caused by power supply as claimed in claim 2 , wherein the load is a resistor.
4. The circuit for processing an image abnormality caused by power supply as claimed in claim 1 , wherein the voltage current regulation unit comprises a low drop-out (LDO) voltage regulator or a DC/DC converter.
5. The circuit for processing an image abnormality caused by power supply as claimed in claim 1 , wherein the horizontal driver of the AFE processing unit provides a horizontal clock to the image-capturing unit, so that the image-capturing unit transmits an image data being captured.
6. The circuit for processing an image abnormality caused by power supply as claimed in claim 5 , wherein when the dummy loading device is set at the turned-on state, the current output from the voltage current regulation unit first flows into the dummy loading device, so that the dummy loading device bears an inrush current noise of the current.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
May 7, 2009
April 17, 2012
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