A high-speed signaling system with adaptive transmit pre-emphasis. A transmit circuit has a plurality of output drivers to output a first signal onto a signal path. A receive circuit is coupled to receive the first signal via the signal path and configured to generate an indication of whether the first signal exceeds a threshold level. A first threshold control circuit is coupled to receive the indication from the receive circuit and configured to adjust the threshold level according to whether the first signal exceeds the threshold level. A drive strength control circuit is coupled to receive the indication from the receive circuit and configured to adjust a drive strength of at least one output driver of the plurality of output drivers according to whether the first signal exceeds the threshold level.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method of operation within a signaling system, the method comprising: transmitting a digital sequence to a receiver using a transmit equalizer, the transmit equalizer having a plurality of taps; receiving feedback from the receiver representing a setting for at least one of the plurality of taps, the feedback adjusted to compensate for a target signal level; and updating a tap weight associated with the at least one of the plurality of taps responsive to the feedback.
2. The method of claim 1 , where transmitting a digital sequence includes using a plurality of drivers, at least one driver for each tap, and updating the tap weight includes incrementally adjusting a drive strength of each driver associated with the at least one of the plurality of taps.
3. The method of claim 1 , where transmitting a digital sequence includes using a transmit shift register to transmit a serial digital signal to the receiver.
4. The method of claim 3 , where using a transmit shift register to transmit a serial digital signal includes transmitting a multi-data rate signal to the receiver and where receiving feedback includes receiving feedback via a back channel signaling path.
5. The method of claim 3 , where using a transmit shift register to transmit a serial digital signal includes transmitting a multi-data rate signal to the receiver and transmitting an embedded clock signal in the multi-data rate signal.
6. The method of claim 1 , where the plurality of taps includes at least a main tap and a post tap, and where transmitting a digital sequence includes, for each one of the plurality of taps, driving both a signal and a complement of the signal to generate a differential output.
7. The method of claim 1 , embodied at least in part in the receiver, the method further comprising using an adaptive sampler to generate an error sample according to whether a signal representing the data sequence as received at the receiver exceeds the target signal level.
8. The method of claim 7 , where the target signal level is a data level threshold and where the feedback is dependent upon the error sample.
9. The method of claim 7 , where the method further comprises using a data filter at the receiver to detect a specific data sequence, and where updating is performed responsive to detection of the specific data sequence.
10. The method of claim 1 , where the method further comprises using a data filter at the receiver to detect a specific data sequence, and where the target signal level is updated based upon matching a specific data pattern using the data filter.
11. The method of claim 1 , where the target signal level is a data level threshold.
12. The method of claim 11 , where the data level threshold is adaptively generated based upon an error sign representing a difference between a signal value level and the data level threshold.
13. The method of claim 11 , where the data level threshold is adaptively generated responsive to multiple data pattern frequencies, substantially concurrently with the updating a tap weight associated with the at least one of the plurality of taps responsive to the feedback, to adjust the data level to an average data level driving the tap weights to provide a substantially flattened frequency response over the multiple frequencies.
14. The method of claim 1 , where the plurality of taps includes a pre-tap, where transmitting includes transmitting the digital sequence using the pre-tap, and where updating includes updating a tap weight associated with the pre-tap.
15. The method of claim 1 , where the tap weight is a multi-bit value.
16. The method of claim 1 , at least partially embodied in the receiver, the method further comprising adaptively updating in the receiver a data level threshold.
17. The method of claim 1 , where updating includes iteratively updating a tap weight for each one of the plurality of taps.
18. The method of claim 17 , where updating further includes each time any tap weight is updated, comparing cumulative drive strength to a power threshold and scaling tap weights associated with all of the plurality of taps to avoid exceeding the power threshold.
19. An apparatus, comprising: a set of drivers to transmit a digital sequence to a receiver, each driver controlled in association with one of a plurality of taps; and an update circuit to update a tap weight associated with at least one of the plurality of taps responsive to feedback from the receiver, the feedback representing a setting for the at least one of the plurality of taps, the feedback adjusted to compensate for a target signal level.
20. The apparatus of claim 19 , where the apparatus is embodied as a transmitter.
21. The apparatus of claim 19 , embodied in a signaling system including a transmitter and the receiver, the transmitter including the set of drivers and the update circuit, the receiver further including an adaptive module to adaptively adjust the target signal level.
22. The apparatus of claim 21 , the transmitter and the receiver embodied as respective integrated circuit devices, the signaling system further comprising a printed trace segment connecting the respective integrated circuit devices to carry the digital sequence.
23. The apparatus of claim 19 , further comprising a transmit shift register, the set of drivers coupled to the transmit shift register to transmit the digital sequence as a serial signal.
24. The apparatus of claim 19 , where the update circuit is to adjust a drive strength of each driver associated with update of the tap weight.
25. The apparatus of claim 19 , where the set of drivers are to transmit a multi-data rate signal to the receiver.
26. The apparatus of claim 19 , where the set of drivers are to convey a clock signal to the receiver embedded in the transmission of the digital sequence.
27. The apparatus of claim 19 , where the plurality of taps includes at least a main tap and a post tap, and where the set of drivers includes, for each one of the plurality of taps, circuitry to drive both a signal and a complement of the signal, to generate a differential output representing the digital sequence.
28. The apparatus of claim 19 , where the feedback is dependent upon an error signal generated at the receiver.
29. The apparatus of claim 19 , where the plurality of taps includes a pre-tap, where the update circuit adjusts a tap weight associated with the pre-tap.
30. The apparatus of claim 29 , where the tap weight is a multi-bit value.
31. The apparatus of claim 29 , where the update circuit iteratively updates a tap weight for each one of the plurality of taps.
32. The apparatus of claim 19 , further comprising means for scaling tap weights associated with all of the plurality of taps to avoid exceeding a power threshold.
33. The apparatus of claim 19 , embodied at least in part in a receiver, the receiver having an adaptive sampler to generate an error signal according to whether a signal representing the data sequence as received at the receiver exceeds a data level threshold.
34. The apparatus of claim 33 , where the feedback is dependent upon the error signal.
35. The apparatus of claim 33 , further comprising a data filter at the receiver to detect a specific data sequence, and where the update circuit updates the tap weight responsive to detection of the specific data sequence.
36. The apparatus of claim 19 , further comprising a data filter to detect a specific data sequence, and where the update circuit updates the tap weight dependent upon matching a specific data pattern using the data filter.
37. The apparatus of claim 19 , where the target signal level is a data level threshold.
38. The apparatus of claim 37 , where the data level threshold is adaptively generated based upon an error sign representing a difference between a sample value and the data level threshold.
39. The apparatus of claim 38 , where the data level threshold is adaptively generated responsive to multiple data pattern frequencies, where the update circuit is to substantially concurrently update a tap weight associated with each one of the plurality of taps, responsive to the feedback, and where the apparatus is to adjust the tap weights to provide a substantially flattened frequency response over the multiple frequencies.
40. An apparatus, comprising: means for transmitting a digital sequence to a receiver using a transmit equalizer having a plurality of taps; means for receiving feedback from the receiver representing a setting for at least one of the plurality of taps, the feedback adjusted to compensate for a target signal level; and means for updating a tap weight associated with the at least one of the plurality of taps responsive to the feedback.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
January 25, 2010
May 22, 2012
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