Patentable/Patents/US-8278754
US-8278754

Metal line in semiconductor device and method for forming the same

PublishedOctober 2, 2012
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

A method includes forming a buffer lower metal line over a semiconductor substrate for absorbing an external impact, forming a pre-metal-dielectric layer which covers the buffer lower metal line, the pre-metal-dielectric layer having a via hole formed therein to expose a portion of the buffer lower metal line, forming a seed layer over a surface of the pre-metal-dielectric layer having the via hole formed therein, forming polyimide which exposes the via hole and the seed layer formed over the pre-metal-dielectric layer in the vicinity of the via hole, growing an upper metal line over the exposed seed layer, subjecting the semiconductor substrate having the upper metal line formed thereon to a thermal process, removing the polyimide by dry etching, and bonding a bonding portion onto the upper metal line.

Patent Claims
7 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. An apparatus comprising: a buffer lower metal line formed over a semiconductor substrate for absorbing an external impact, wherein the buffer lower metal line has a thickness of approximately 1 μm to 2 μm ; a pre-metal-dielectric layer which covers the buffer lower metal line, the pre-metal-dielectric layer having a via hole formed therein to expose a portion of the buffer lower metal line; a seed layer formed over a surface of the pre-metal-dielectric layer in the via hole and in the vicinity of the via hole; an upper metal line formed over the seed layer; and a bonding portion bonded onto the upper metal line.

2

2. The apparatus of claim 1 , wherein the upper metal line includes: a copper layer formed over the seed layer.

3

3. The apparatus of claim 2 , wherein the copper layer has a thickness of 10 μm˜20 μm.

4

4. The apparatus of claim 2 wherein the upper metal line includes: a metal layer including at least one of Ni, Pd and Au formed over the copper layer.

5

5. The apparatus of claim 1 , including a metal barrier layer for preventing metal from diffusing between the pre-metal-dielectric layer and the seed layer.

6

6. The apparatus of claim 5 , wherein the metal barrier layer includes at least one of Ta, TaN, TiW, and TiN.

7

7. The apparatus of claim 1 , wherein the pre-metal-dielectric layer includes: an oxide film; and a nitride film formed over the oxide film.

Classification Codes (CPC)

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Patent Metadata

Filing Date

October 21, 2009

Publication Date

October 2, 2012

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Cite as: Patentable. “Metal line in semiconductor device and method for forming the same” (US-8278754). https://patentable.app/patents/US-8278754

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