Programmable controller for executing a plurality of independent sequence programs in parallel

1. A programmable controller which executes a plurality of independent sequence programs in parallel, the programmable controller comprising: a plurality of arithmetic-logic units configured to execute predetermined first instructions in the sequence programs by hardware; a plurality of MPUs configured to execute second instructions in the independent sequence programs, from among the plurality of independent sequence programs executed in parallel, which can not be executed by the arithmetic-logic units; first transfer means configured to transfer information associated with at least one of the second instructions generated in the arithmetic-logic units to the MPUs in the order of execution of the instructions; and second transfer means configured to transfer information associated with results of execution of the second instructions executed by the MPUs to the arithmetic-logic units which are sources of generation of the information associated with the second instructions, wherein the plurality of arithmetic-logic units are divided into groups as many as the MPUs, each of the groups including at least one arithmetic-logic unit; at least one of the groups includes at least two arithmetic-logic units, and the first and second transfer means and the MPUs are arranged in association with a group including the at least two arithmetic-logic units; and said programmable controller further comprises selection means for selecting, when grouping the arithmetic-logic units into a plurality of groups, respective groups to which individual arithmetic-logic unit is caused to belong.

2. The programmable controller according to claim 1 , wherein the selection means includes a register configured to store data which specifies the group to which each of the arithmetic-logic units is caused to belong, and a selection circuit which associates each of the arithmetic-logic units with the first and second transfer means and the MPU corresponding to the group to which the arithmetic-logic unit belongs in accordance with the data stored in the register.

3. The programmable controller according to claim 2 , wherein the data which specifies the group to which each of the arithmetic-logic units belongs is data on a combination for the shortest execution time for the plurality of individual sequence programs, based on a simulation performed by arbitrarily dividing the sequence programs into the groups.

4. The programmable controller according to claim 1 , wherein said programmable controller further comprises third transfer means, in place of said first transfer means, which directly transfer information associated with said second instructions from one of the arithmetic-logic units to one of the MPUs.

5. The programmable controller according to claim 2 , wherein said programmable controller further comprises third transfer means, in place of said first transfer means, which directly transfer information associated with said second instructions from one of the arithmetic-logic units to one of the MPUs.

6. The programmable controller according to claim 3 , wherein said programmable controller further comprises third transfer means, in place of said first transfer means, which directly transfer information associated with said second instructions from one of the arithmetic-logic units to one of the MPUs.