A mode determination apparatus in a semiconductor apparatus includes a first condition detection block configured to generate a first condition signal in response to a clock enable signal activated when the semiconductor apparatus enters a dynamic voltage scaling mode, a second condition detection block configured to generate a second condition signal in response to an external high voltage in the dynamic voltage scaling mode, the external high voltage having a voltage level in the dynamic voltage scaling mode different from a voltage level in a normal mode, and a signal processing block configured to generate a dynamic voltage scaling mode signal in response to the first condition signal and the second condition signal.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A mode determination apparatus in a semiconductor apparatus, comprising: a first condition detection block configured to generate a first condition signal in response to a clock enable signal, the clock enable signal being activated when the semiconductor apparatus enters a dynamic voltage scaling mode; a second condition detection block configured to generate a second condition signal in response to an external high voltage in the dynamic voltage scaling mode, the external high voltage having a voltage level in the dynamic voltage scaling mode different from a voltage level in a normal mode; and a signal processing block configured to generate a dynamic voltage scaling mode signal in response to the first condition signal and the second condition signal.
2. The apparatus according to claim 1 , wherein the first condition signal is activated with a predetermined time of pulse width when the clock enable signal is activated.
3. The apparatus according to claim 1 , wherein the second condition detection block is configured to compare the external high voltage with a predetermined level and output a comparison result as the second condition signal.
4. The apparatus according to claim 1 , wherein the signal processing block is configured to activate the dynamic voltage scaling mode signal when both the first condition signal and the second condition signal are activated, and deactivate the dynamic voltage scaling mode signal when the first condition signal is activated and the second condition signal is deactivated.
5. The apparatus according to claim 1 , wherein the signal processing block comprises: a signal change unit configured to drive a state node in response to the first condition signal and the second condition signal; and a signal maintaining unit configured to output a voltage of the state node as the dynamic voltage scaling mode signal and latch the voltage of the state node.
6. The apparatus according to claim 5 , wherein the signal change unit comprises: a signal activation unit configured to charge the state node when both the first condition signal and the second condition signal are activated; and a signal deactivation unit configured to discharge the state node when the first condition signal is activated and the second condition signal is deactivated.
7. The apparatus according to claim 5 , wherein the signal maintaining unit is configured to additionally receive a reset signal and initialize the dynamic voltage scaling mode signal in response to the reset signal.
8. The apparatus according to claim 7 , wherein the signal maintaining unit comprises: a latch initialized in response to the reset signal.
9. A method for determining a dynamic voltage scaling mode, comprising the steps of: activating a first condition signal by detecting whether a clock enable signal is activated; activating a second condition signal by detecting that an external high voltage is lowered to a predetermined level or less; and activating a dynamic voltage scaling mode signal in response to the first condition signal and the second condition signal.
10. The method according to claim 9 , wherein the step of activating the dynamic voltage scaling mode signal comprises the steps of: driving a state node in response to the first condition signal and the second condition signal; and outputting a voltage of the state node as the dynamic voltage scaling mode signal and latching the voltage of the state node.
11. An apparatus for detecting a pumping voltage in a semiconductor apparatus, comprising: a dynamic voltage scaling mode determination unit configured to generate a dynamic voltage scaling mode signal that is activated when the semiconductor apparatus enters a dynamic voltage scaling mode; and a pumping signal generation unit configured to generate a pumping enable signal by dividing an internal high voltage differently according to the dynamic voltage scaling mode signal.
12. The apparatus according to claim 11 , wherein the dynamic voltage scaling mode determination unit comprises: a first condition detection block configured to generate a first condition signal in response to a clock enable signal activated when entering the dynamic voltage scaling mode; a second condition detection block configured to generate a second condition signal in response to an external high voltage in the dynamic voltage scaling mode, wherein a voltage level of the external high voltage in the dynamic voltage scaling mode is different from the voltage level in a normal mode; and a signal processing block configured to generate the dynamic voltage scaling mode signal in response to the first condition signal and the second condition signal.
13. The apparatus according to claim 12 , wherein the first condition signal is activated with a predetermined time of pulse width when the clock enable signal is activated.
14. The apparatus according to claim 12 , wherein the second condition detection block is configured to compare the external high voltage with a predetermined level and output a comparison result as the second condition signal.
15. The apparatus according to claim 12 , wherein the signal processing block is configured to activate the dynamic voltage scaling mode signal when both the first condition signal and the second condition signal are activated, and deactivate the dynamic voltage scaling mode signal when the first condition signal is activated and the second condition signal is deactivated.
16. The apparatus according to claim 12 , wherein the signal processing block comprises: a signal change unit configured to drive a state node in response to the first condition signal and the second condition signal; and a signal maintaining unit configured to output a voltage of the state node as the dynamic voltage scaling mode signal and latch the voltage of the state node.
17. The apparatus according to claim 16 , wherein the signal change unit comprises: a signal activation unit configured to charge the state node when both the first condition signal and the second condition signal are activated; and a signal deactivation unit configured to discharge the state node when the first condition signal is activated and the second condition signal is deactivated.
18. The apparatus according to claim 16 , wherein the signal maintaining unit is configured to additionally receive a reset signal and initialize the dynamic voltage scaling mode signal in response to the reset signal.
19. The apparatus according to claim 18 , wherein the signal maintaining unit comprises: a latch initialized in response to the reset signal.
20. The apparatus according to claim 11 , wherein the pumping signal generation unit comprises: a voltage division section configured to divide the internal high voltage by changing a voltage division ratio according to the dynamic voltage scaling mode signal to generate a comparative high voltage; and a voltage comparison section configured to compare the comparative high voltage with a reference voltage to generate the pumping enable signal.
21. A method for detecting a pumping voltage, comprising the steps of: activating a first condition signal by detecting whether a clock enable signal is activated; activating a second condition signal by detecting that an external high voltage is substantially equal to or lower than a predetermined level; activating a dynamic voltage scaling mode signal in response to the first condition signal and the second condition signal; dividing an internal high voltage differently according to the dynamic voltage scaling mode signal to generate a comparative high voltage; and comparing the comparative high voltage with a reference voltage to generate a pumping enable signal.
22. The method according to claim 21 , wherein the step of activating the dynamic voltage scaling mode signal comprises the steps of: driving a state node in response to the first condition signal and the second condition signal; and outputting a voltage of the state node as the dynamic voltage scaling mode signal and latching the voltage of the state node.
23. The method according to claim 22 , further comprising, before the step of activating the first condition signal, a step of initializing the dynamic voltage scaling mode signal in response to a reset signal.
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November 16, 2010
November 27, 2012
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