Patentable/Patents/US-8330475
US-8330475

Circuit for detecting a magnitude and phase of an impedance of a load

PublishedDecember 11, 2012
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

The invention relates to an antenna which is coupled to an RF amplifier. Environmental conditions change the impedance of the antenna, which reduces output power, efficiency and linearity. A circuit is provided which is designed to detect the impedance of the antenna. With the measured impedance, impedance matching can be accomplished. The circuit for detecting the impedance detects the signal travelling from the RF amplifier to the antenna, and measures the peak voltage and the peak current of this signal. Furthermore, the phase difference between the voltage and the current is measured. The advantage of the circuit is its compactness allowing for an easy integration on a chip. Furthermore, an impedance matching circuit is suggested which makes use of the above circuit for detecting the impedance.

Patent Claims
19 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. Circuit for detecting a magnitude and a phase of an impedance of a load, the load being connectable to a radio frequency (RF) amplifier by means of a feed line, the circuit comprising: a) first means for sensing a peak value of an output voltage of the RF amplifier, the first means being connected by a node to the feed line; b) second means for sensing a peak value of an output current of the RF amplifier, the second means comprising a peak sensor element placed in the feed line and being circuited in series between the RF amplifier and the load, wherein the peak sensor element is a resistor, a capacitor or a coil; and c) third means for c1) measuring a signal whose value depends on the phase between output voltage and output current, or c2) deriving the phase between output voltage and output current using linear multiplication; d) whereby the first means and/or the second means for peak value sensing comprise, in a branch coupled to the feed line, d1) a mixer and an amplitude limiter or d2) a peak diode detector; e) wherein an energy flow from the RF amplifier to the load through the feed line is used for detecting the impedance and phase.

2

2. Circuit according to claim 1 , whereby the third means comprise a phase shifter and a mixer.

3

3. Circuit according to claim 1 , whereby the feed line comprises either an inductance or a capacitance and whereby the third means comprise two amplitude limiters and a mixer.

4

4. Circuit according to claim 1 , whereby the first means and the second means comprise buffer amplifiers.

5

5. Circuit according to claim 1 , whereby the RF amplifier comprises an array of at least two transistors, whereby the first means arranged to sense a collector voltage of one of the transistors and whereby the second means is arranged to sense a corresponding collector current.

6

6. Circuit according to claim 1 , whereby a transistor is directly coupled to the output of the RF amplifier, whereby the transistor comprises a collector, and whereby a load line of the collector comprises a sense resistor.

7

7. Circuit according to claim 1 , whereby the RF amplifier comprises an array of at least two transistors, whereby the first means is arranged to sense a collector voltage of one of the transistors and whereby the second means is arranged to sense a corresponding emitter current.

8

8. Circuit according to claim 1 , whereby the second means comprises a pick-up coil arranged to sense a collector current of a transistor that is part of the RF amplifier.

9

9. Impedance matching circuit for matching the impedance of a load to the impedance of a RF amplifier, whereby the load is connectable to the RF amplifier by means of a feed line, the impedance matching circuit comprising: an adaptive output network connected in between the RF amplifier and the load, an impedance detector coupled to a node of the feed line, wherein an energy flow from the RF amplifier to the load through the feed line is used for detecting the impedance and phase of the load, and a control unit to adjust the adaptive matching circuit in response to a measured impedance, wherein the impedance detector comprises: a) first means for sensing a peak value of an output voltage of the RF amplifier, the first means being connected by the node, b) second means for sensing a peak value of an output current of the RF amplifier, the second means comprising a peak sensor element placed in the feed line and being circuited in series between the RF amplifier and the load, wherein the peak sensor element is one of a resistor, a capacitor, and a coil, and c) third means for c1) measuring a signal whose value depends on the phase between output voltage and output current, or c2) deriving the phase between output voltage and output current by means of linear multiplication d) whereby the first means and/or the second means comprise, in a branch coupled to the feed line, d1) a mixer and an amplitude limiter or d2) a peak diode detector.

10

10. Impedance matching circuit according to claim 9 , whereby the node is located between the RF amplifier and the adaptive output network.

11

11. Impedance matching circuit according to claim 10 , whereby the node is located between the adaptive output network and the load.

12

12. A circuit comprising: a voltage sensor configured to sense a peak value of an output voltage of a radio frequency (RF) amplifier, the RF amplifier being connectable to a load by a feed line, the voltage sensor being connected by a node to the feed line; a current sensor configured to sense a peak value of an output current of the RF amplifier, the current sensor comprising a peak sensor element placed in the feed line in series between the RF amplifier and the load, wherein the peak sensor element is a resistor, a capacitor, or a coil, wherein the voltage sensor and/or the current sensor comprise, in a branch coupled to the feed line, a mixer and an amplitude limiter or a peak diode detector; and a circuit element configured to measure a signal whose value depends on a phase between output voltage and output current, or configured to derive the phase between output voltage and output current by linear multiplication, wherein an energy flow from the RF amplifier to the load through the feed line is used for detecting an impedance and phase of the load.

13

13. The circuit according to claim 12 , wherein the circuit element comprises a phase shifter and a mixer.

14

14. The circuit according to claim 12 , wherein the feed line comprises either an inductance or a capacitance and wherein the circuit element comprises two amplitude limiters and a mixer.

15

15. The circuit according to claim 12 , wherein the voltage sensor and the current sensor comprise buffer amplifiers.

16

16. The circuit according to claim 12 , wherein the RF amplifier comprises an array of at least two transistors, wherein the voltage sensor is arranged to sense a collector voltage of one of the transistors and wherein the current sensor is arranged to sense a corresponding collector current.

17

17. The circuit according to claim 12 , wherein a transistor is directly coupled to the output of the RF amplifier, the transistor comprising a collector, wherein a load line of the collector comprises a sense resistor.

18

18. The circuit according to claim 12 , wherein the RF amplifier comprises an array of at least two transistors, wherein the voltage sensor is arranged to sense a collector voltage of one of the transistors and whereby the current sensor is arranged to sense a corresponding emitter current.

19

19. The circuit according to claim 12 , wherein the current sensor comprises a pick-up coil arranged to sense a collector current of a transistor that is part of the RF amplifier.

Classification Codes (CPC)

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Patent Metadata

Filing Date

September 29, 2005

Publication Date

December 11, 2012

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