A method for manufacturing a semiconductor light-emitting device of the invention includes: forming a semiconductor layer including a light-emitting layer and a first interconnect layer on a major surface of a temporary substrate; dividing the semiconductor layer and the first interconnect layer into a plurality of chips by a trench; collectively bonding each divided portion of the first interconnect layer of a plurality of chips to be bonded not adjacent to each other out of the plurality of chips on the temporary substrate to a second interconnect layer while opposing the major surface of the temporary substrate and the major surface of a supporting substrate forming the second interconnect layer, and collectively transferring a plurality of the bonded chips from the temporary substrate to the supporting substrate after irradiating interfaces between the bonded chips and the temporary substrate and separating the chips and the temporary substrate from each other.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method for manufacturing a semiconductor light-emitting device comprising: forming a semiconductor layer including a light-emitting layer on a major surface of a temporary substrate; forming a first interconnect layer on a second major surface side of the semiconductor layer on a side opposite to a first major surface in contact with the major surface of the temporary substrate; forming a trench penetrating through the first interconnect layer and the semiconductor layer to reach the temporary substrate and dividing the semiconductor layer and the first interconnect layer into a plurality of chips by the trench; forming a second interconnect layer on a major surface of a supporting substrate; opposing the major surface of the temporary substrate and the major surface of the supporting substrate to each other and bonding collectively each divided portion of the first interconnect layer of a plurality of chips to be bonded not adjacent to each other out of the plurality of chips on the temporary substrate, to the second interconnect layer; irradiating interfaces between the first major surfaces of the chips to be bonded to the second interconnect layer and the temporary substrate with laser light to separate the chips to be bonded and the temporary substrate and transferring collectively the plurality of chips to be bonded from the temporary substrate to the supporting substrate; and cutting off a portion of the supporting substrate on an outside of a region to which each of the chips is bonded.
2. The method according to claim 1 , wherein the forming the first interconnect layer includes: forming a first bonding metal and a second bonding metal electrically independent of each other; and forming a first insulating film between the first bonding metal and the second bonding metal.
3. The method according to claim 2 , wherein the first bonding metal, the second bonding metal, and the first insulating film are formed over an entire bonding surface of the chip to the second interconnect layer, and the bonding surface including the first bonding metal, the second bonding metal, and the first insulating film is substantially planarized.
4. The method according to claim 3 , wherein the forming the second interconnect layer includes: forming a third bonding metal to be bonded to the first bonding metal; forming a fourth bonding metal to be bonded to the second bonding metal; and forming a second insulating film between the third bonding metal and the fourth bonding metal, and a bonding surface of the third bonding metal, the fourth bonding metal, and the second insulating film to the chip is substantially planarized.
5. The method according to claim 3 , wherein the first bonding metal is formed in an island shape, and the second bonding metal is formed in a closed ring shape surrounding continuously a periphery of the first bonding metal.
6. The method according to claim 1 , further comprising transferring the chips remaining on the temporary substrate without being transferred to the supporting substrate to another supporting substrate.
7. The method according to claim 1 , wherein a plurality of the chips placed at regular intervals on the temporary substrate are collectively transferred to the supporting substrate as the chips to be bonded.
8. The method according to claim 1 , wherein the first interconnect layer and the second interconnect layer are bonded to each other with a same kind of metal.
9. The method according to claim 1 , wherein a gap is formed between a chip other than the chips to be bonded and the supporting substrate in a state where the major surface of the temporary substrate and the major surface of the supporting substrate are opposed to each other and the chips to be bonded are bonded to the second interconnect layer.
10. The method according to claim 1 , further comprising providing a phosphor layer on the first major surface of the semiconductor layer after separating the temporary substrate.
11. The method according to claim 10 , further comprising: covering a side surface of the chip with a protective film transparent to the light emitted from the light-emitting layer after separating the temporary substrate; and providing the phosphor layer also in a region opposed to the side surface with the protective film interposed.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
March 18, 2010
February 5, 2013
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