A pixel of an image sensor includes only two signal lines per pixel, a pinned photodiode for sensing light, a floating base bipolar transistor, and no reset and address transistors. The floating base bipolar transistor provides the pixel with a gain, which can increase pixel sensitivity and reduce noise. The pixel also incorporates a vertical blooming control structure for an efficient blooming suppression. The output terminals of the pixel are coupled to a common column output line terminated by a special current sensing correlated double sampling circuit, which is used for subtraction of emitter leakage current. Based on this structure, the pixel has high sensitivity, high response uniformity, low noise, reduced size, and efficient layout.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A pixel of an image sensor, the pixel comprising: a photodiode including a first type of semiconductor above a second type of semiconductor and configured to generate a photo-generated charge; a bipolar transistor including a collector comprising the first type of semiconductor and configured to sense the photo-generated charge; a transfer gate configured to couple the photodiode with a floating base region of the bipolar transistor and to transfer the photo-generated charge from the photodiode to the floating base region of the bipolar transistor; and an anti-blooming region disposed at a portion of a substrate bulk below the photodiode and configured to drain an overflow charge from the photodiode; wherein at least a portion of the anti-blooming region is disposed directly below the photodiode.
2. The pixel of claim 1 , wherein the bipolar transistor comprises a P-N-P-type bipolar transistor.
3. The pixel of claim 1 , further comprising a shallow trench isolation region.
4. The pixel of claim 1 , wherein the anti-blooming region comprises an N + -type region.
5. The pixel of claim 1 , wherein the bipolar transistor is vertically arranged.
6. An array of pixels, the array comprising: a first pixel, a second pixel, and a third pixel, wherein each of the first, second, and third pixels include: a photodiode configured to generate a photo-generated charge; a bipolar transistor comprising an emitter region and a floating base region, wherein the bipolar transistor is configured to sense the photo-generated charge; a transfer gate configured to couple the photodiode to the floating base region and to transfer the photo-generated charge from the photodiode to the floating base region; a first signal line configured to couple the transfer gate of the first pixel to the transfer gate of the second pixel; and a second signal line configured to couple the emitter region of the bipolar transistor of the first pixel to the emitter region of the bipolar transistor of the third pixel; wherein the second signal line comprises a metal line configured to cover at least a portion of the floating base region of the bipolar transistor of the first pixel and at least a portion of the floating base region of the bipolar transistor of the third pixel.
7. An image sensor pixel configured to be in a row of pixels and to be in a column of pixels, the image sensor pixel comprising: a bipolar transistor including an emitter region and a floating base region; a photodiode configured to generate a photo-generated charge; a transfer gate configured to couple the photodiode to the floating base region of the bipolar transistor and to transfer the photo-generated charge from the photodiode to the floating base region of the bipolar transistor; a column output line configured to couple the emitter region of the bipolar transistor to an emitter region of a bipolar transistor in another pixel from the column of pixels; and a current-sensing correlated double-sampling (CDS) circuit configured to be coupled to the column output line; wherein the column output line comprises a metal line configured to cover at least a portion of the floating base region of the bipolar transistor and at least a portion of a floating base region in the bipolar transistor in the another pixel.
8. A pixel of an image sensor, the pixel comprising: a photodiode including a first type of semiconductor above a second type of semiconductor and configured to generate a photo-generated charge; a bipolar transistor including a collector comprising the first type of semiconductor and configured to sense the photo-generated charge; a transfer gate configured to couple the photodiode with a floating base region of the bipolar transistor and to transfer the photo-generated charge from the photodiode to the floating base region of the bipolar transistor; and an anti-blooming region disposed at a portion of a substrate bulk below the photodiode and configured to drain an overflow charge from the photodiode; wherein at least a portion of the anti-blooming region is disposed directly below the photodiode; and wherein the bipolar transistor and the photodiode are arranged diagonally and the photodiode is substantially octahedral.
9. An array of pixels, the array comprising: a first pixel, a second pixel, and a third pixel, wherein each of the first, second, and third pixels include: a photodiode comprising a first type of semiconductor above a second type of semiconductor and configured to generate a photo-generated charge; a bipolar transistor comprising: a collector including the first type of semiconductor; an emitter region; and a floating base region; wherein the bipolar transistor is configured to sense the photo-generated charge; a transfer gate configured to couple the photodiode to the floating base region and to transfer the photo-generated charge from the photodiode to the floating base region; a first signal line configured to couple the transfer gate of the first pixel to the transfer gate of the second pixel; and a second signal line configured to couple the emitter region of the bipolar transistor of the first pixel to the emitter region of the bipolar transistor of the third pixel; wherein each of the first, second, and third pixels further comprise an anti-blooming region disposed at a portion of a substrate bulk and configured to drain an overflow charge from the photodiode; and wherein at least a portion of the anti-blooming region is disposed directly below the photodiode.
10. The array of claim 9 , wherein the anti-blooming region comprises an N + -type drain region.
11. An array of pixels, the array comprising: a first pixel, a second pixel, and a third pixel, wherein each of the first, second, and third pixels include: a photodiode configured to generate a photo-generated charge; a bipolar transistor comprising an emitter region and a floating base region, wherein the bipolar transistor is configured to sense the photo-generated charge; a transfer gate configured to couple the photodiode to the floating base region and to transfer the photo-generated charge from the photodiode to the floating base region; a first signal line configured to couple the transfer gate of the first pixel to the transfer gate of the second pixel; a second signal line configured to couple the emitter region of the bipolar transistor of the first pixel to the emitter region of the bipolar transistor of the third pixel; and a current-sensing correlated double-sampling (CDS) circuit configured to be coupled to the second signal line and to operate in a digital domain according to a multipoint sampling and calculation algorithm; wherein each of the first, second, and third pixels further comprise an anti-blooming region disposed at a portion of a substrate bulk and configured to drain an overflow charge from the photodiode.
12. An array of pixels, the array comprising: a first pixel, a second pixel, and a third pixel, wherein each of the first, second, and third pixels include: a photodiode configured to generate a photo-generated charge; a bipolar transistor comprising an emitter region and a floating base region, wherein the bipolar transistor is configured to sense the photo-generated charge; a transfer gate configured to couple the photodiode to the floating base region and to transfer the photo-generated charge from the photodiode to the floating base region; a first signal line configured to couple the transfer gate of the first pixel to the transfer gate of the second pixel; and a second signal line configured to couple the emitter region of the bipolar transistor of the first pixel to the emitter region of the bipolar transistor of the third pixel; wherein: the first pixel and second pixel comprise a row; the transfer gate of the first pixel and the transfer gate of the second pixel are configured to receive a positive bias; each of the transfer gate of the first pixel and the transfer gate of the second pixel comprise a charge transfer threshold; and each of the transfer gate of the first pixel and the transfer gate of the second pixel are configured to receive a positive bias voltage that is less than the charge transfer threshold when the row is not selected.
13. An array of pixels, the array comprising: a first pixel, a second pixel, and a third pixel, wherein each of the first, second, and third pixels include: a photodiode comprising a first type of semiconductor above a second type of semiconductor and configured to generate a photo-generated charge; a bipolar transistor comprising: a collector including the first type of semiconductor; an emitter region; and a floating base region; wherein the bipolar transistor is configured to sense the photo-generated charge; a transfer gate configured to couple the photodiode to the floating base region and to transfer the photo-generated charge from the photodiode to the floating base region; a first signal line configured to couple the transfer gate of the first pixel to the transfer gate of the second pixel; a second signal line configured to couple the emitter region of the bipolar transistor of the first pixel to the emitter region of the bipolar transistor of the third pixel; and an anti-blooming region disposed at a portion of a substrate bulk below the photodiode and configured to drain an overflow charge from the photodiode; wherein at least a portion of the anti-blooming region is disposed directly below the photodiode; and wherein the bipolar transistor and the photodiode are arranged diagonally and the photodiode is substantially octahedral.
14. An image sensor pixel configured to be in a row of pixels and to be in a column of pixels, the image sensor pixel comprising: a bipolar transistor including: a collector comprising a first type of semiconductor; an emitter region; and a floating base region; a photodiode including the first type of semiconductor above a second type of semiconductor and configured to generate a photo-generated charge; a transfer gate configured to couple the photodiode to the floating base region of the bipolar transistor and to transfer the photo-generated charge from the photodiode to the floating base region of the bipolar transistor; a column output line configured to couple the emitter region of the bipolar transistor to an emitter region of a bipolar transistor in another pixel from the column of pixels; a current-sensing correlated double-sampling (CDS) circuit configured to be coupled to the column output line; and an anti-blooming region disposed at a portion of a substrate bulk below the photodiode and configured to drain an overflow charge from the photodiode; wherein at least a portion of the anti-blooming region is disposed directly below the photodiode.
15. The image sensor pixel of claim 14 , wherein the anti-blooming region comprises an N + -type drain region.
16. An image sensor pixel configured to be in a row of pixels and to be in a column of pixels, the image sensor pixel comprising: a bipolar transistor including an emitter region and a floating base region; a photodiode configured to generate a photo-generated charge; a transfer gate configured to couple the photodiode to the floating base region of the bipolar transistor and to transfer the photo-generated charge from the photodiode to the floating base region of the bipolar transistor; a column output line configured to couple the emitter region of the bipolar transistor to an emitter region of a bipolar transistor in another pixel from the column of pixels; and a current-sensing correlated double-sampling (CDS) circuit configured to be coupled to the column output line and to operate in a digital domain according to a multipoint sampling and calculation algorithm.
17. An image sensor pixel configured to be in a row of pixels and to be in a column of pixels, the image sensor pixel comprising: a bipolar transistor including an emitter region and a floating base region; a photodiode configured to generate a photo-generated charge; a transfer gate configured to couple the photodiode to the floating base region of the bipolar transistor and to transfer the photo-generated charge from the photodiode to the floating base region of the bipolar transistor; a column output line configured to couple the emitter region of the bipolar transistor to an emitter region of a bipolar transistor in another pixel from the column of pixels; a current-sensing correlated double-sampling (CDS) circuit configured to be coupled to the column output line; and a row output line configured to couple the transfer gate to a transfer gate of another pixel in the row of pixels; wherein the transfer gate is further configured to receive a positive bias when the row is not selected and to have a charge transfer threshold when the row is selected; and wherein the positive bias is less than the charge transfer threshold.
18. An image sensor pixel configured to be in a row of pixels and to be in a column of pixels, the image sensor pixel comprising: a bipolar transistor including: a collector comprising a first type of semiconductor; an emitter region; and a floating base region; a photodiode including the first type of semiconductor above a second type of semiconductor and configured to generate a photo-generated charge; a transfer gate configured to couple the photodiode to the floating base region of the bipolar transistor and to transfer the photo-generated charge from the photodiode to the floating base region of the bipolar transistor; a column output line configured to couple the emitter region of the bipolar transistor to an emitter region of a bipolar transistor in another pixel from the column of pixels; a current-sensing correlated double-sampling (CDS) circuit configured to be coupled to the column output line; and an anti-blooming region disposed at a portion of a substrate bulk below the photodiode and configured to drain an overflow charge from the photodiode; wherein at least a portion of the anti-blooming region is disposed directly below the photodiode; and wherein the bipolar transistor and the photodiode are arranged diagonally and the photodiode is substantially octahedral.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
December 21, 2007
February 12, 2013
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