A structure of power semiconductor device integrated with clamp diodes having separated gate metal pads is disclosed. The separated gate metal pads are wire bonded together on the gate lead frame. This improved structure can prevent the degradation of breakdown voltage due to electric field in termination region blocked by polysilicon or gate metal.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A semiconductor power device comprising: a source region of a first conductivity type; a body region of a second conductivity type encompassing said source region; a first drain region of said first conductivity type disposed outside of edge termination; a gate separated by an insulating layer from channel region of said body region; a source metal layer connected to said source regions and said body regions; a first gate metal connected to said gate; a first drain metal connected to said first drain region; said source region, said body region, said gate and said first drain region formed in a top side of semiconductor chip; a gate-drain clamp diode connected between a second gate metal on the gate-drain clamp diode and said first drain metal, composed of multiple back-to-back polysilicon Zener diodes disposed outside of edge termination area without having said polysilicon Zener diode or said second gate metal cross over said edge termination; a second drain region formed on a bottom side of said semiconductor chip; a second drain metal layer connected to said second drain region; and said first and second gate metals connected together at a gate lead frame through at least one bonding wire.
2. The semiconductor power device of claim 1 is a trench IGBT wherein: said gate is a trenched gate; said source region is an emitter region of said first conductivity type; said body region is a base region of said second conductivity type; said first drain region is a first collector region of said first conductivity type; said source metal is a emitter metal; said first drain metal is a first collector metal; and said gate-drain clamp diode is a gate-collector clamp diode.
3. The semiconductor power device of claim 2 further comprises an on-resistance reduction implantation region having same conductivity type as said emitter region surrounding trench bottom of each said trenched gate.
4. The semiconductor power device of claim 2 is a PT trench IGBT further comprising: a heavily doped substrate of said second conductivity type; a first epitaxial layer of said first conductivity type grown on said substrate; a second epitaxial layer of said first conductivity type grown on said first epitaxial layer, having less doping concentration than said first epitaxial layer; and a second collector region of said second conductivity type is disposed on said bottom side of said substrate.
5. The semiconductor power device of claim 2 is a NPT trench IGBT further comprising: a lightly doped substrate of said first conductivity type; and a second collector region of said second conductivity type is disposed on the bottom side of said lightly doped substrate.
6. The semiconductor power device of claim 2 is a NPT trench IGBT further comprising: a lightly doped substrate of said first conductivity type; and a second collector region comprising alternately heavily doped regions with said first and second type conductivity formed on the bottom side of said lightly doped substrate.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
March 24, 2011
February 19, 2013
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