A semiconductor device includes a plurality of electrode layers provided at designated positions of a semiconductor substrate, an organic insulation film formed on the semiconductor substrate by selectively exposing designated areas of the electrode layers, and projection electrodes for outside connection, the projection electrodes being formed on the designated areas of the electrode layers. Thickness of the organic insulation film situated in the vicinity of the periphery of the projection electrodes is greater than thickness of the organic insulation film situated between the projection electrodes.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A manufacturing method of a semiconductor device, comprising: forming a plurality of electrode pads on a semiconductor; forming an organic insulation protection film to continuously cover a gap between the neighboring electrode pads so that substantially centers of the electrode pads are exposed; forming a solder layer on the electrode pads; applying a first dry etching process to the surface of the organic protection film excluding a periphery of the solder layer on the electrode pads; applying a reflow process to the solder layer on the electrode pads after applying the first dry etching process so that a projection electrode is formed on each of the electrode pads; and applying a second dry etching process to the surface of the organic insulation protection film excluding the periphery of the projection electrode.
2. The manufacturing method of the semiconductor device as claimed in claim 1 , wherein each of the first and second dry etching processes is a radio frequency (RF) dry etching.
3. The manufacturing method of the semiconductor device as claimed in claim 1 , wherein gas used for the second dry etching process is mixed gas of oxygen gas, carbon tetrafluoride (CF 4 ) or trifluoromethane (CHF 3 ).
4. The manufacturing method of the semiconductor device as claimed in claim 1 , wherein nitrogen gas or argon gas is used for the first dry etching process.
5. The manufacturing method of the semiconductor device as claimed in claim 1 , wherein a thickness of the organic insulation protection film excluding the periphery of the projection electrode is smaller than a thickness of the organic insulation protection film in the periphery of projection electrode.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
June 25, 2008
April 16, 2013
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