A microelectronic interconnect element can include a plurality of first metal lines and a plurality of second metal lines interleaved with the first metal lines. Each of the first and second metal lines has a surface extending within the same reference plane. The first metal lines have surfaces above the reference plane and remote therefrom and the second metal lines have surfaces below the reference plane and remote therefrom. A dielectric layer can separate a metal line of the first metal lines from an adjacent metal line of the second metal lines.
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1. A microelectronic interconnect element, comprising: a plurality of first metal lines each having a lower surface whose width and length extend within a reference plane, an upper surface remote from the reference plane, and edges extending between the upper and lower surfaces, a first distance between the upper and lower surfaces of such first metal line defining a thickness of such first metal line; a plurality of second metal lines interleaved with the first metal lines in a direction of the width of the first metal lines, each of the second metal lines having an upper surface whose width and length extend within the reference plane and a lower surface remote from the reference plane, a second distance between the upper and lower surfaces of such second metal line defining a thickness of such second metal line; and a dielectric layer separating a metal line of the first metal lines from an adjacent metal line of the second metal lines, wherein a pitch between the first metal line and the second metal line adjacent thereto is smaller than a first pitch between adjacent ones of the first metal lines and is smaller than a second pitch between adjacent ones of the second metal lines, and wherein the first pitch is equal to at least twice a width of one of the first metal lines, and second pitch is equal to at least twice a width of one of the second metal lines, such that, in a direction of the widths of the first metal lines, at least some of the first metal lines are insulated and spaced from at least some of the second metal lines by less than the width of one of the first metal lines.
This microelectronic interconnect element has alternating rows of first and second metal lines. The first metal lines have a lower surface on a reference plane, an upper surface, and a thickness between those surfaces. The second metal lines are interleaved with the first, with each second line having an upper surface on the reference plane, a lower surface, and a thickness between. A dielectric layer separates adjacent first and second metal lines. The spacing (pitch) between a first and a neighboring second metal line is smaller than the spacing between adjacent first lines and smaller than the spacing between adjacent second lines. The spacing between adjacent first lines is at least twice the width of one first line, and the spacing between adjacent second lines is at least twice the width of one second line. Some first metal lines are insulated from some second metal lines by a distance less than the width of one first metal line.
2. The microelectronic interconnect element as claimed in claim 1 , wherein the first and second metal lines are formed by etching.
This microelectronic interconnect element, as described with alternating rows of first and second metal lines separated by a dielectric material where the space between neighboring first and second metal lines is less than the space between adjacent lines of the same type, has its metal lines created using etching techniques.
3. The microelectronic interconnect element as claimed in claim 1 , wherein at least some of the first and second metal lines are formed by plating.
This microelectronic interconnect element, as described with alternating rows of first and second metal lines separated by a dielectric material where the space between neighboring first and second metal lines is less than the space between adjacent lines of the same type, has at least some of its metal lines created using plating techniques.
4. The microelectronic interconnect element as claimed in claim 1 , wherein the widths of the first and second metal lines are less than about 60 microns.
This microelectronic interconnect element, as described with alternating rows of first and second metal lines separated by a dielectric material where the space between neighboring first and second metal lines is less than the space between adjacent lines of the same type, has first and second metal lines with widths of less than 60 microns.
5. The microelectronic interconnect element as claimed in claim 1 , wherein the widths of the first and second metal lines are at most about 20 microns.
This microelectronic interconnect element, as described with alternating rows of first and second metal lines separated by a dielectric material where the space between neighboring first and second metal lines is less than the space between adjacent lines of the same type, has first and second metal lines with widths of at most 20 microns.
6. The microelectronic interconnect element as claimed in claim 1 , wherein the widths of the first and second metal lines are uniform and are at most about 10 microns.
This microelectronic interconnect element, as described with alternating rows of first and second metal lines separated by a dielectric material where the space between neighboring first and second metal lines is less than the space between adjacent lines of the same type, has first and second metal lines with a uniform width of at most 10 microns.
7. The microelectronic interconnect element as claimed in claim 1 , wherein the at least some of the first metal lines are insulated and spaced from the at least some of the second metal lines by less than 10% of the width of one of the first metal lines.
This microelectronic interconnect element, as described with alternating rows of first and second metal lines separated by a dielectric material where the space between neighboring first and second metal lines is less than the space between adjacent lines of the same type, has first metal lines that are insulated and spaced from the second metal lines by less than 10% of the width of the first metal line.
8. A microelectronic interconnect element, comprising: a plurality of first metal lines each having a lower surface whose width and length extend within a reference plane, an upper surface remote from the reference plane, and edges extending between the upper and lower surfaces, a first distance between the upper and lower surfaces of such first metal line defining a thickness of such first metal line; a plurality of second metal lines interleaved with the first metal lines in a direction of the width of the first metal lines, each of the second metal lines having an upper surface whose width and length extend within the reference plane and a lower surface remote from the reference plane, a second distance between the upper and lower surfaces of such second metal line defining a thickness of such second metal line; and a dielectric layer separating a metal line of the first metal lines from an adjacent metal line of the second metal lines, wherein each of the second metal lines have edges extending between the upper and lower surfaces of such second metal line and a spacing between the edge of one of the first metal lines and an adjacent edge of one of the second metal lines is smaller than the widths of the adjacent first and second metal lines.
This microelectronic interconnect element has alternating rows of first and second metal lines. The first metal lines have a lower surface on a reference plane, an upper surface, and a thickness between those surfaces. The second metal lines are interleaved with the first, with each second line having an upper surface on the reference plane, a lower surface, and a thickness between. A dielectric layer separates adjacent first and second metal lines. Each of the second metal lines has edges between its upper and lower surfaces. The spacing between the edge of a first metal line and the edge of an adjacent second metal line is smaller than the widths of those adjacent first and second metal lines.
9. The microelectronic interconnect element as claimed in claim 8 , wherein the first and second metal lines are formed by etching.
This microelectronic interconnect element, as described with alternating rows of first and second metal lines separated by a dielectric material where the space between the edges of neighboring first and second metal lines is less than the width of the metal lines, has its metal lines created using etching techniques.
10. The microelectronic interconnect element as claimed in claim 8 , wherein at least some of the first and second metal lines are formed by plating.
This microelectronic interconnect element, as described with alternating rows of first and second metal lines separated by a dielectric material where the space between the edges of neighboring first and second metal lines is less than the width of the metal lines, has at least some of its metal lines created using plating techniques.
11. The microelectronic interconnect element as claimed in claim 8 , wherein the widths of the first and second metal lines are less than about 60 microns.
This microelectronic interconnect element, as described with alternating rows of first and second metal lines separated by a dielectric material where the space between the edges of neighboring first and second metal lines is less than the width of the metal lines, has first and second metal lines with widths of less than 60 microns.
12. The microelectronic interconnect element as claimed in claim 8 , wherein the widths of the first and second metal lines are at most about 20 microns.
This microelectronic interconnect element, as described with alternating rows of first and second metal lines separated by a dielectric material where the space between the edges of neighboring first and second metal lines is less than the width of the metal lines, has first and second metal lines with widths of at most 20 microns.
13. The microelectronic interconnect element as claimed in claim 8 , wherein the widths of the first and second metal lines are uniform and are at most about 10 microns.
This microelectronic interconnect element, as described with alternating rows of first and second metal lines separated by a dielectric material where the space between the edges of neighboring first and second metal lines is less than the width of the metal lines, has first and second metal lines with a uniform width of at most 10 microns.
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July 8, 2009
June 11, 2013
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