A method for accessing a flash memory includes: writing a data stream into at least a page of at least one data block of the flash memory, where each page of the data block includes an identity code; reading at least one identity code of the page; and determining a specific page according to at least the identity code, where the specific page is a last page that the data stream is written to before the flash memory is disconnected from a power source.
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1. A method for accessing a flash memory, comprising: writing a data stream into a plurality of pages of a plurality of data blocks of the flash memory, where for each of the pages, when data is written into the page, simultaneously writing an identity code into the page; reading identity codes of the pages; and determining a specific page by comparing the identity codes of the pages of the data blocks, where the specific page is a last page that the data stream is written to before the flash memory is disconnected from a power source.
A method for accessing data in flash memory involves writing a continuous stream of data into multiple pages within several data blocks. As data is written to each page, a unique "identity code" is simultaneously written onto that page. To find the last page written to before a power loss, the system reads these identity codes and compares them across all pages in the data blocks. The page with the identity code indicating it was the last one written is then identified as the specific page.
2. The method of claim 1 , wherein the identity codes are write sequence numbers, and each of the write sequence numbers records a sequence of the data stream written into the pages.
The method for accessing flash memory, where a data stream is written into multiple pages of multiple data blocks of the flash memory, with each page receiving a simultaneous identity code, involves using write sequence numbers as the identity codes. These sequence numbers record the order in which the data stream was written to each page. The last page written before power loss is determined by comparing these write sequence numbers to identify the most recent write.
3. The method of claim 2 , wherein when the data stream is written into a page of a first data block, the method further comprises: recording a value K as a write sequence number of the page of the first data block; and when the data stream is written into a page of a second data block, the method further comprises: recording a value (K+1) or (K-1) as a write sequence number of the page of the second data block.
In the flash memory access method using write sequence numbers to identify pages, when a data stream is written to a page in a first data block, the page is assigned a write sequence number, say 'K'. When writing the data stream to a page in a second data block, that page receives a write sequence number of either 'K+1' or 'K-1'. This establishes a relative ordering between the writes to different data blocks, allowing determination of the latest written page by comparing sequence numbers after an unexpected power loss.
4. The method of claim 2 , wherein the step of determining the specific page by comparing the identity codes comprises: selecting a maximum write sequence number or a minimum write sequence number as a specific write sequence number; and determining a page which includes the specific write sequence number as the specific page.
In the flash memory access method that uses write sequence numbers as identity codes, the step of determining the last written page involves selecting either the maximum or the minimum write sequence number from all pages in the data blocks as the "specific write sequence number". The page containing this specific write sequence number is then identified as the specific page, representing the last page written to before the flash memory was disconnected from its power source.
5. The method of claim 4 , wherein when more than one pages have the specific write sequence number, the step of determining the page which includes the specific write sequence number as the specific page comprises: selecting a page which has a maximum physical address among the more than one pages which include the specific write sequence number.
In the flash memory access method utilizing write sequence numbers, if multiple pages share the same "specific write sequence number" (the max or min), the method selects a page among those with the specific write sequence number that has the highest physical address. This resolves ambiguities and pinpoints the final written page because later writes generally occur at higher physical addresses. The page is determined the last written page to before power loss.
6. The method of claim 2 , wherein when the data stream is written into a first page, the method further comprises: recording a value K as a write sequence number of the first page; and when the data stream is written into a second page, the method further comprises: recording a value (K+1) or (K−1) as a write sequence number of the second page.
In the flash memory access method that utilizes write sequence numbers, when a data stream is written into the initial page, it is assigned a sequence number 'K'. When writing the data stream to subsequent pages, each is assigned a sequence number incrementally as either 'K+1' or 'K-1'. This method is used to track write order.
7. The method of claim 1 , further comprising: utilizing an error correction code of the specific page to determine if error data of the specific page is correctable.
The flash memory access method, that writes a data stream into pages and simultaneously assigns identity codes, also checks the specific (last written) page for data integrity by using an error correction code (ECC) associated with that page. The ECC is used to determine if any errors in the specific page's data are correctable, allowing the system to assess the validity of the data on the page last written to before a power loss.
8. The method of claim 7 , further comprising: when it is determined that the error data of the specific page is correctable, correcting the error data of the specific page, and writing corrected error data into a blank data block.
The flash memory access method, after determining the last written page and its ECC status, includes a data recovery process. If the error correction code indicates that the data errors on that specific last written page are correctable, the system proceeds to correct those errors. The corrected data is then written into a new, blank data block, ensuring the recovered data is stored safely and minimizing data loss risk.
9. The method of claim 8 , further comprising: when it is determined that the error data of the specific page is correctable, writing data of all the other pages of the data block into the blank data block.
The flash memory access method performs complete data restoration when the error correction code of the last written page is determined to be correctable. Not only is the error data of the specific last written page corrected and rewritten to a blank data block, but the data from all other pages within the same data block as that last written page is also copied into this same blank data block. This reconstructs the entire data block, preserving data beyond just the last written page.
10. The method of claim 1 , wherein the step of determining the specific page by comparing the identity codes comprises: when a first page includes an abnormal identity code, designating the first page as the specific page.
The flash memory access method that identifies the last written page using identity codes can also detect data corruption. Specifically, if a page contains an "abnormal identity code" (an unexpected or invalid value), that page is immediately designated as the specific last written page. This approach prioritizes identifying potentially corrupted data resulting from incomplete writes due to power loss by flagging any irregularities in the identity codes.
11. A memory device, comprising: a flash memory; and a controller, for writing a data stream into a plurality of pages of a plurality of data blocks of the flash memory, where for each of the pages, when the controller writes data into the page, the controller simultaneously writes an identity code into the page; for reading identity codes of the pages; and for determining a specific page by comparing the identity codes of the pages of the data blocks, where the specific page is a last page that the data stream is written to before the flash memory is disconnected from a power source.
A memory device for data storage consists of a flash memory component and a controller. The controller writes data streams to multiple pages within multiple data blocks of the flash memory. When the controller writes data to each page, it simultaneously writes an identity code to that page. Later, to determine the last page written to before power loss, the controller reads identity codes of all pages and identifies a specific page based on these. The specific page represents the last page written.
12. The memory device of claim 11 , wherein the identity code are write sequence numbers, and each of the write sequence numbers records a sequence of the data stream written into the pages.
The memory device, where the controller writes identity codes alongside data into flash memory pages, uses write sequence numbers as its identity codes. Each write sequence number records the write order of the data stream into the pages. The controller identifies the last page written by comparing these sequence numbers, effectively tracking the sequence of writes to determine the most recent data write before any interruption.
13. The memory device of claim 12 , wherein when the data stream is written into a page of a first data block, the controller records a value K as a write sequence number of the page of the first data block; and when the data stream is written into a page of a second data block, the controller records a value (K+1) or (K−1) as a write sequence number of the page of the second data block.
In the memory device that uses write sequence numbers to mark the order of data written to flash memory pages, the controller manages these sequence numbers. When the controller writes data to a page of the first data block, it records a value 'K' as its write sequence number. When writing to a page in a second data block, the controller then records a value of either 'K+1' or 'K-1' to that page as a write sequence number.
14. The memory device of claim 12 , wherein the controller selects a maximum write sequence number or a minimum write sequence number as a specific write sequence number, and determines a page which includes the specific write sequence number as the specific page.
This invention relates to memory devices, specifically addressing the challenge of efficiently managing write operations in non-volatile memory systems. The technology involves a controller that tracks write sequence numbers to identify and manage data pages during write operations. The controller selects either the maximum or minimum write sequence number as a specific write sequence number and determines a corresponding page that includes this number as a specific page. This selection process helps optimize data placement and retrieval, ensuring efficient use of memory resources. The controller may also compare write sequence numbers to determine the order of write operations, which aids in maintaining data consistency and integrity. The system further includes mechanisms to handle write operations based on the determined sequence numbers, improving overall performance and reliability. By dynamically selecting and utilizing sequence numbers, the memory device can efficiently manage data writes, reducing overhead and enhancing operational efficiency. This approach is particularly useful in systems where maintaining accurate write order and minimizing write amplification are critical.
15. The memory device of claim 14 , wherein when more than one pages have the specific write sequence number, the controller selects a page which has a maximum physical address among the more than one pages which include the specific write sequence number.
If the controller in the memory device finds that multiple pages have the same "specific write sequence number" (maximum or minimum), it further analyzes them. The controller selects the page among those with the specific write sequence number that has the highest physical address. This is used to pinpoint the true last-written page by assuming that later writes are more likely to have a higher physical address.
16. The memory device of claim 12 , wherein when the data stream is written into a first page, the controller records a value K as a write sequence number of the first page; and when the data stream is written into a second page, the controller records a value (K+1) or (K−1) as a write sequence number of the second page.
In the memory device, when the controller writes a data stream to the first page, it sets a sequence number 'K'. For subsequent writes, when the controller writes to a second page, it then sets the sequence number to either 'K+1' or 'K-1'. The data pages are therefore numbered sequentially as the data stream is written.
17. The memory device of claim 11 , wherein the controller is further utilized for utilizing an error correction code of the specific page to determine if error data of the specific page is correctable.
This invention relates to memory devices, specifically addressing error correction in non-volatile memory systems. The technology aims to improve data reliability by detecting and correcting errors in stored data using error correction codes (ECC). The memory device includes a controller that manages data storage and retrieval operations. The controller is configured to access a specific page of memory and determine whether error data within that page is correctable by applying an error correction code associated with the page. If the error is correctable, the controller performs error correction to restore the data. If the error is uncorrectable, the controller may take further action, such as marking the page as defective or triggering a data recovery process. The system ensures data integrity by dynamically assessing and correcting errors during read operations, enhancing the reliability of non-volatile memory storage. The invention is particularly useful in flash memory, solid-state drives, and other storage systems where data corruption can occur due to wear, electrical interference, or manufacturing defects. The error correction mechanism helps extend the lifespan of memory devices by preventing data loss and reducing the need for frequent rewrites.
18. The memory device of claim 17 , further comprising: when it is determined that the error data of the specific page is correctable, the controller corrects the error data of the specific page, and writes corrected error data into a blank data block.
The memory device implements data recovery when the controller determines the last written page and its ECC status. If the error correction code indicates that the data errors on that specific last written page are correctable, the controller corrects those errors. The corrected data is then written into a blank data block, safeguarding the recovered data by moving it to a new location.
19. The memory device of claim 18 , further comprising: when it is determined that the error data of the specific page is correctable, the controller writes data of all the other pages of the data block into the blank data block.
The memory device guarantees full data restoration. After determining the last written page and confirming its data is correctable, the controller not only corrects and rewrites the data from the last written page but also rewrites data from all other pages of that same data block into the blank data block. This action rebuilds the entire data block.
20. The memory device of claim 11 , wherein when a first page includes an abnormal identity code, the controller designates the first page as the specific page.
In the memory device, the controller can flag pages with data corruption. If the controller detects an "abnormal identity code" within a first page (an invalid or unexpected value), it immediately designates that first page as the specific page. By marking these errors, the device focuses on potentially corrupted pages, which might contain incomplete writes due to unexpected power loss.
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May 3, 2010
June 11, 2013
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