On a surface of a semiconductor substrate, a plurality of terraces formed stepwise by an atomic step are formed in the substantially same direction. Using the semiconductor substrate, a MOS transistor is formed so that no step exists in a carrier traveling direction (source-drain direction).
Legal claims defining the scope of protection, as filed with the USPTO.
1. A semiconductor substrate, wherein a substrate surface is provided with a plurality of terraces formed stepwise by an atomic step and has a terrace/step structure which is linear and periodical in a specific direction, wherein the substrate surface is a silicon (100) orientation surface which has the same off angle throughout the entire substrate surface and the plurality of the terraces are extended straight in the same specific direction and have the same widths, wherein the silicon (100) orientation surface has an off direction inclined toward a direction of <011> with respect to <01-1> direction and a predetermined of angle so as to realize the linear and periodical terrace/step structure.
2. The semiconductor substrate claimed in claim 1 , wherein the off direction and the off angle are the same direction and the same angle, respectively, over the entire surface of the silicon (100) orientation surface.
3. The semiconductor substrate claimed in claim 2 , wherein the off direction is equal to 36 degrees or 126 degrees while the off angle falls within, the range between 0.056 degree and 0.06 degree.
4. The semiconductor substrate claimed in claim 3 , wherein the atomic step has a height of 0.13 nm while each terrace width is equal to 124 nm.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
October 6, 2008
July 23, 2013
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