Patentable/Patents/US-8504798
US-8504798

Management of non-volatile memory systems having large erase blocks

PublishedAugust 6, 2013
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

A non-volatile memory system of a type having blocks of memory cells erased together and which are programmable from an erased state in units of a large number of pages per block. If the data of only a few pages of a block are to be updated, the updated pages are written into another block provided for this purpose. The valid original and updated data are then combined at a later time, when doing so does not impact on the performance of the memory. If the data of a large number of pages of a block are to be updated, however, the updated pages are written into an unused erased block and the unchanged pages are also written to the same unused block. By handling the updating of a few pages differently, memory performance is improved when small updates are being made.

Patent Claims
19 claims

Legal claims defining the scope of protection. Each claim is shown in both the original legal language and a plain English translation.

Claim 1

Original Legal Text

1. A method of writing data into a non-volatile memory system of a type having blocks of memory cells that are simultaneously erasable and which individually store a given number of host units of data, comprising: designating a first of the blocks for storage of a number of units of data with sequential logical addresses that is less than a pre-set proportion of the given number, the pre-set proportion being less than the given number, thereafter responding to a plurality of successive host commands to write a number of units of data less than the pre-set proportion of the given number that have sequential logical addresses by writing their data into the first designated block with sequential physical addresses, and responding to host commands to write a number of units of data having sequential logical addresses that is equal to or in excess of the pre-set proportion of said given number by writing their data into a block other than the first designated block.

Plain English Translation

A method for writing data to non-volatile memory (like flash), where the memory is organized into erasable blocks, each storing a set number of data units. The method designates a block for storing a small number of sequential data units (less than a certain proportion of the block's capacity). When multiple write commands arrive with sequential data, and each command writes less than this proportion, the data is written sequentially into the designated block. If a write command requests to write more than or equal to the proportion, the data is written to a different block. This optimizes small writes.

Claim 2

Original Legal Text

2. The method of claim 1 , which additionally comprises, prior to writing data of the plurality of successive host commands: determining whether or not the successive host commands individually include a number of units of data having sequential logical addresses less than the pre-set proportion of said given number.

Plain English Translation

The method for writing data to non-volatile memory described in claim 1 additionally determines, before processing successive host commands, whether each command involves writing a small amount of sequential data (less than the pre-set proportion of the block's capacity). This determination is made before writing any data from those commands to the designated block.

Claim 3

Original Legal Text

3. The method of claim 2 , wherein the pre-set proportion is set within a range of 25-75 percent of said given number.

Plain English Translation

In the method for writing data to non-volatile memory described in claim 2, the pre-set proportion that determines whether data is considered a "small write" is configured within a range of 25% to 75% of the total number of data units that a memory block can store. This allows adjusting the sensitivity of small write optimization.

Claim 4

Original Legal Text

4. The method of claim 1 , wherein the non-volatile memory cells are organized into multiple sub-arrays and said blocks of memory cells include memory cells of two or more of the sub-arrays.

Plain English Translation

In the method for writing data to non-volatile memory described in claim 1, the non-volatile memory cells are physically organized into multiple sub-arrays. Each block of memory, which is simultaneously erasable, includes memory cells from two or more of these sub-arrays. This means erasure spans multiple physical sections of the memory.

Claim 5

Original Legal Text

5. The method of claim 1 , wherein the pre-set proportion is set within a range of 25-75 percent of said given number.

Plain English Translation

In the method for writing data to non-volatile memory described in claim 1, the pre-set proportion that determines whether data is considered a "small write" is configured within a range of 25% to 75% of the total number of data units that a memory block can store. This allows adjusting the sensitivity of small write optimization.

Claim 6

Original Legal Text

6. A method of writing data into a non-volatile memory system of a type having blocks of memory cells that are simultaneously erasable and which individually store a given number of host units of data, comprising: designating at least a first one of the blocks to store a number of units of data having sequential logical addresses that is less than a pre-set fraction of said given number, thereafter responding to a plurality of successive host commands to individually write units of data into the memory system by determining whether a number of the units of data with sequential logical addresses is less than the pre-set fraction, and, if so, by writing the data into the first dedicated block, and responding to host commands to write units of data having a number of sequential logical addresses that is equal to or in excess of the pre-set fraction of said given number by writing the data into a block other than the first dedicated block.

Plain English Translation

A method for writing data to non-volatile memory (like flash), where memory is organized into erasable blocks, each storing a set number of data units. At least one block is designated to store a small number of sequential data units (less than a pre-set fraction of block's capacity). When write commands arrive, the method checks if the command involves writing a small amount of sequential data. If so, the data is written into the designated block. Otherwise, for larger sequential writes (equal to or greater than the fraction), data is written to a block other than the designated one.

Claim 7

Original Legal Text

7. The method of claim 6 , wherein the non-volatile memory cells are organized into multiple sub-arrays and said blocks of memory cells include memory cells of two or more of the sub-arrays.

Plain English Translation

In the method for writing data to non-volatile memory described in claim 6, the non-volatile memory cells are physically organized into multiple sub-arrays. Each block of memory, which is simultaneously erasable, includes memory cells from two or more of these sub-arrays. This means erasure spans multiple physical sections of the memory.

Claim 8

Original Legal Text

8. The method of claim 6 , wherein the fraction is set within a range of 25-75 percent of said given number.

Plain English Translation

In the method for writing data to non-volatile memory described in claim 6, the fraction used to determine whether data qualifies as a "small write" (and thus is written to the designated block) is set within a range of 25% to 75% of the total number of data units that a memory block can store.

Claim 9

Original Legal Text

9. A method of operating a non-volatile memory system in response to commands received from a host to individually write logically addressed units of data therein, the memory system having memory cells grouped into blocks of memory cells that are simultaneously erasable and which individually store a given number of units of data at individual physical addresses, the logical addresses of received units of data being mapped within the memory system into corresponding physical addresses where the received units of data are stored, comprising: allocating a first one of the blocks to store units of data having a number of sequential logical addresses less than a pre-determined fraction of said given number, allocating a second one of the blocks to store units of data having a number of sequential logical addresses equal to or in excess of the fraction of said given number, in response to receipt of a command to write data having a number of sequential logical addresses less than said fraction, determining whether the first block has sufficient erased capacity to store the received data and, if so, writing the received data into sequential physical addresses of the first block, and in response to receipt of a command to write data having a number of sequential logical addresses equal to or in excess of said fraction, determining whether the second block has erased capacity to store the data and, if so, writing the data into sequential physical addresses of the second block.

Plain English Translation

A method for operating non-volatile memory (like flash) in response to write commands from a host, where the memory is organized into erasable blocks, each storing a set number of data units. Logical addresses from the host are mapped to physical addresses in the memory. The method allocates one block for storing small sequential data writes (less than a fraction of block's capacity), and another block for larger sequential writes (equal to or greater than the fraction). When a write command is received, its data size is checked. If it's a small write and the first block has space, the data is written there. If it's a larger write and the second block has space, the data is written there.

Claim 10

Original Legal Text

10. The method of claim 9 , additionally comprising: in response to receipt of the command to write data having a number of sequential logical addresses less than said fraction, if the first block does not have sufficient erased capacity to store the received data, allocating a third one of the blocks to store units of data having a number of sequential logical addresses less than a fraction of said given number and then writing the received data into sequential physical addresses of the third block, and in response to receipt of the command to write data having a number of sequential logical addresses equal to or in excess of said fraction, if the second block does not have sufficient erased capacity to store the received data, allocating a fourth one of the blocks to store units of data having a number of sequential logical addresses equal to or in excess of the fraction of said given number and then writing the received data into sequential physical addresses of the fourth block.

Plain English Translation

The method described in claim 9 adds a mechanism for handling full blocks. If a small write is received, but the designated "small write" block is full, a third block is allocated for small writes, and the data is written there. Similarly, if a large write is received, but the designated "large write" block is full, a fourth block is allocated for large writes, and the data is written there. This prevents write failures due to block capacity.

Claim 11

Original Legal Text

11. The method of claim 10 , wherein the fraction is set to be within a range of 25-75 percent of said given number.

Plain English Translation

Electronics and power management. This invention relates to a method for controlling power distribution in a system. A specific aspect of this method involves adjusting the amount of power allocated to a particular component or function. The fraction of a "given number" that represents this allocated power is specifically controlled. This fraction is set to fall within a predetermined range, specifically between 25 percent and 75 percent, inclusive. This controlled allocation allows for fine-tuning power usage based on system requirements or operating conditions.

Claim 12

Original Legal Text

12. The method of claim 9 , wherein the non-volatile memory cells are organized into multiple sub-arrays and said blocks of memory cells include memory cells of two or more of the sub-arrays.

Plain English Translation

In the method described in claim 9, the non-volatile memory cells are physically organized into multiple sub-arrays. Each block of memory, which is simultaneously erasable, includes memory cells from two or more of these sub-arrays. This means erasure spans multiple physical sections of the memory.

Claim 13

Original Legal Text

13. The method of claim 9 , wherein the fraction is set to be within a range of 25-75 percent of said given number.

Plain English Translation

In the method described in claim 9, the fraction used to distinguish between "small" and "large" writes (and thus determine which type of block to use) is set within a range of 25% to 75% of the total number of data units that a memory block can store.

Claim 14

Original Legal Text

14. A method of writing data into a non-volatile memory system of a type having blocks of memory cells that are simultaneously erasable and which individually store a given number of host units of data, comprising: designating at least a first one of the blocks to store a number of units of data received by the memory system with individual ones of multiple write commands that have sequential logical addresses less than a pre-set fraction of said given number, responding to the receipt of multiple commands by the memory system to individually write one or more units of data thereinto by, for individual commands, (a) determining whether the command specifies the writing of a number of units of data having sequential logical addresses that is less than the pre-set fraction, and (b) determining whether the first block has enough erased capacity to store the number of units of data provided with the command, wherein when both of conditions (a) and (b) above are determined to exist, thereafter writing the units of data into the first block, but when either one of conditions (a) or (b) above is determined not to exist, writing the units of data into one of the blocks other than the first block.

Plain English Translation

A method for writing data to non-volatile memory, where memory is organized into erasable blocks, each storing a set number of data units. At least one block is designated for storing small data writes received from multiple write commands (sequential logical addresses less than a fraction of capacity). When write commands arrive, for each command, it is determined: (a) if the data size is less than the fraction, and (b) if the designated block has sufficient space. If both are true, the data is written to the block. Otherwise, data is written to another block.

Claim 15

Original Legal Text

15. The method of claim 14 , wherein the pre-set fraction is within a range of 25-75 percent of said given number.

Plain English Translation

In the method for writing data to non-volatile memory described in claim 14, the pre-set fraction, used to determine if a write is considered "small" and eligible for the designated block, is within the range of 25% to 75% of the given number of host units of data that the block can store.

Claim 16

Original Legal Text

16. The method of claim 14 , additionally comprising: designating at least a second one of the blocks to store a number of units of data received by the memory system with individual ones of multiple write commands that have sequential logical addresses equal to or greater than the pre-set fraction, and responding to the receipt of multiple commands by the memory system to individually write one or more units of data thereinto by additionally, for individual commands, (c) determining whether the command specifies the writing of a number of units of data greater than the given number, wherein when neither of the conditions (a) nor (c) above exist, writing the units of data into the second block, without regard to whether condition (b) exists or not, but when the condition (c) above is determined to exist, writing the units of data into one of the blocks other than the first or second blocks.

Plain English Translation

The method described in claim 14 is enhanced by also designating a second block for storing larger data writes (sequential logical addresses equal to or greater than the pre-set fraction). Upon receiving write commands, in addition to checking for smaller writes (condition a), it also determines (c) whether the write command specifies the writing of data greater than the given number of host units. If it isn't a small write(condition a is false) and condition (c) is also false, then the write is directed to the second block, regardless of condition (b) existing or not. Only when condition (c) exists (i.e., the write request size is greater than the given number) will the data be written to blocks other than the designated first or second blocks.

Claim 17

Original Legal Text

17. The method of claim 16 , wherein the pre-set fraction is set to be within a range of 25-75 percent of said given number.

Plain English Translation

In the method described in claim 16, the pre-set fraction, used to distinguish between small and large writes, is set to be within a range of 25% to 75% of the given number of host units of data that can be stored.

Claim 18

Original Legal Text

18. In a non-volatile memory system having memory cells grouped into blocks of memory cells that are simultaneously erasable and which individually store a given number of units of data at individual physical addresses, the logical addresses of received units of data being mapped within the memory system into corresponding physical addresses where the received units of data are stored, a method of operation in response to received commands to individually write logically addressed units of data therein, comprising: designating a first one of the blocks to store units of data having a number of sequential logical addresses that is less than a pre-determined fraction of said given number, designating a second one of the blocks to store units of data having a number of sequential logical addresses that is greater than the fraction of said given number, providing at least another one of the blocks that is fully erased, and in response to receipt of a command to write data into the memory system, identifying the number of units of the data that have sequential logical addresses, determine whether the number of such units with sequential logical addresses are less than the fraction, and, if so, writing the data to the first of the blocks, but if the amount of data is not less than the fraction, then writing the data to the second of the blocks if there is sufficient capacity therein, but if there is not sufficient capacity in the second of the blocks, writing the data to the fully erased block.

Plain English Translation

In a non-volatile memory system where memory is organized into erasable blocks, each storing a set number of data units, a method operates as follows: A first block is designated for small sequential writes (less than a fraction of capacity). A second block is designated for larger sequential writes (greater than the fraction). Another block is kept fully erased. Upon receiving a write command, the data size is identified. If it's a small write, the data is written to the first block. If it's a larger write, the data is written to the second block *if* there is sufficient capacity. If the second block is full, then the data is written to the fully erased block.

Claim 19

Original Legal Text

19. The method of claim 18 , wherein the pre-predetermined fraction is set to be within a range of 25-75 percent of said given number.

Plain English Translation

In the method described in claim 18, the pre-determined fraction that distinguishes between "small" and "large" writes is set to be within a range of 25% to 75% of the given number of host units of data that each block can store.

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Patent Metadata

Filing Date

December 30, 2003

Publication Date

August 6, 2013

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