To improve the flatness of the surface and improve the reliability of a semiconductor device when expitaxially growing semiconductor crystal layers of different types on a single silicon wafer, provided is a semiconductor wafer which includes: a base wafer having a silicon crystal in the surface thereof, the silicon crystal having a first dent and a second dent; a first Group IVB semiconductor crystal located in the first dent and exposed; a second Group IVB semiconductor crystal located in the second dent; and a Group III-V compound semiconductor crystal located above the second Group IVB semiconductor crystal in the second dent and exposed.
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1. A semiconductor wafer, comprising: a base wafer having a silicon crystal in a surface thereof, the silicon crystal having a first dent and a second dent; a first Group IVB semiconductor crystal located in the first dent and exposed; a second Group IVB semiconductor crystal located in the second dent; and a Group III-V compound semiconductor crystal located above the second Group IVB semiconductor crystal in the second dent and exposed.
A semiconductor wafer features a silicon base with two depressions (dents). The first dent contains an exposed Group IVB semiconductor crystal (e.g., silicon-germanium). The second dent contains a second Group IVB semiconductor crystal, with an exposed Group III-V compound semiconductor crystal (e.g., AlInGaAsP) situated above it. This structure allows for integrating different semiconductor materials on a single wafer to improve performance and reliability.
2. semiconductor wafer according to claim 1 , wherein the first Group IVB semiconductor crystal is a crystal of Si 1-a1 Ge a1 (0≦a1≦1), and the second Group IVB semiconductor crystal is Si 1-a2 Ge a2 (0.6≦a2≦1).
In the semiconductor wafer described in claim 1, the first Group IVB crystal is made of Si1-a1Gea1 (where the proportion of Germanium 'a1' is between 0 and 1, inclusive). The second Group IVB crystal is made of Si1-a2Gea2 (where the proportion of Germanium 'a2' is between 0.6 and 1, inclusive), meaning it has a higher concentration of Germanium than the first.
3. The semiconductor wafer according to claim 2 , wherein a1 and a2 satisfy a1≦a2.
In the semiconductor wafer where the first Group IVB crystal is Si1-a1Gea1 (0≦a1≦1) and the second is Si1-a2Gea2 (0.6≦a2≦1), the amount of Germanium in the first crystal (a1) is less than or equal to the amount of Germanium in the second crystal (a2). This means the second Group IVB crystal always has a higher proportion of Germanium.
4. The semiconductor wafer according to claim 1 , wherein the surface of the silicon crystal, the surface of the first Group IVB semiconductor crystal, and the surface of the Group III-V compound semiconductor crystal are located on substantially the same plane.
In the semiconductor wafer described in claim 1, the top surface of the silicon base crystal, the top surface of the first Group IVB crystal, and the top surface of the Group III-V crystal are all aligned to be on roughly the same plane. This planarization facilitates subsequent processing steps and improves device performance.
5. The semiconductor wafer according to claim 1 , wherein the first dent is shallower than the second dent.
In the semiconductor wafer described in claim 1, the first dent, which houses the first Group IVB crystal, is shallower than the second dent, which houses the second Group IVB crystal and the Group III-V compound semiconductor crystal. This difference in depth allows for different layer thicknesses.
6. The semiconductor wafer according to claim 1 , wherein the first dent and the second dent are have substantially the same depth, and the second Group IVB semiconductor crystal is thinner than the first Group IVB semiconductor crystal.
In the semiconductor wafer described in claim 1, both the first dent and second dent have approximately the same depth. To accommodate both a Group IVB crystal and a Group III-V crystal within the second dent, the second Group IVB crystal in the second dent is made thinner than the first Group IVB crystal in the first dent.
7. The semiconductor wafer according to claim 1 , wherein the aspect ratio of the second dent is (√3)/3 or higher.
In the semiconductor wafer described in claim 1, the second dent (which holds the second Group IVB crystal and the Group III-V crystal) has an aspect ratio of (√3)/3 or higher. Aspect ratio refers to the ratio of the depth of the dent to its width. This constraint on aspect ratio aids in crystal growth and material deposition.
8. The semiconductor wafer according to claim 1 further comprising an inhibition member located between the side wall of the first dent and the first Group IVB semiconductor crystal, the inhibition member inhibiting growth of a semiconductor crystal.
In the semiconductor wafer described in claim 1, an "inhibition member" (a material that prevents crystal growth) is placed between the sidewall of the first dent and the first Group IVB crystal. This prevents unwanted crystal growth during the fabrication process, improving device isolation and performance.
9. The semiconductor wafer according to claim 1 further comprising an inhibition member located between the side wall of the second dent and the second Group IVB semiconductor crystal and between the side wall of the second dent and the Group III-V compound semiconductor crystal, the inhibition member inhibiting growth of a semiconductor crystal.
In the semiconductor wafer described in claim 1, an "inhibition member" (a material that prevents crystal growth) is placed between the sidewall of the second dent and both the second Group IVB crystal and the Group III-V compound semiconductor crystal. This prevents unwanted crystal growth along the dent's side, ensuring defined crystal shapes and better device characteristics.
10. The semiconductor wafer according to claim 1 , further comprising a third Group IVB semiconductor crystal that is located on a region of the silicon crystal that is different from regions in which the first dent and the second dent are located.
In addition to the components described in claim 1, the semiconductor wafer also includes a third Group IVB crystal. This crystal is located on a separate area of the silicon base, away from the first and second dents. This allows for incorporating another distinct semiconductor region for different functionalities.
11. The semiconductor wafer according to claim 10 , wherein the third Group IVB semiconductor crystal is Si 1-b Ge b (0≦b≦1).
In the semiconductor wafer that contains a third Group IVB crystal on a separate region as described in claim 10, the third Group IVB crystal is made of Si1-bGeb (where the proportion of Germanium 'b' is between 0 and 1, inclusive). This composition allows for tailoring the electronic properties of this third region.
12. The semiconductor wafer according to claim 1 , wherein the Group III-V compound semiconductor crystal is a crystal of Al x In y Ga 1-x-y As z P 1-z (0≦x≦1, 0≦y≦1, 0≦x+y≦1, 0≦z≦1).
In the semiconductor wafer described in claim 1, the Group III-V compound semiconductor crystal is made of AlxInyGa1-x-yAszP1-z (where x, y, x+y, and z are all between 0 and 1, inclusive). This specific formulation enables precise control over the semiconductor's bandgap and other crucial electronic properties for various applications.
13. A semiconductor wafer comprising: a base wafer having a silicon crystal in a surface thereof; an inhibition member that is located on the base wafer, has a first opening leading to the silicon crystal, a second opening leading to the silicon crystal, and a third opening leading to the silicon crystal, and inhibits growth of a semiconductor crystal; a first Group IVB semiconductor crystal located in the first opening and exposed; a second Group IVB semiconductor crystal located in the second opening; a Group III-V compound semiconductor crystal located above the second Group IVB semiconductor crystal and exposed; and a third Group IVB semiconductor crystal located in the third opening.
A semiconductor wafer contains a silicon base. An "inhibition member" sits on top of the base, preventing crystal growth everywhere except through three openings. The first opening contains an exposed Group IVB crystal. The second opening has a Group IVB crystal, topped by an exposed Group III-V crystal. The third opening has a Group IVB crystal. The inhibition member defines the locations of these distinct crystal regions.
14. The semiconductor wafer according to claim 13 , wherein the first Group IVB semiconductor crystal is a crystal of Si 1-a1 Ge a1 (0≦a1≦1), and the second Group IVB semiconductor crystal is a crystal of Si 1-a2 Ge a2 (0.6≦a2≦1).
In the semiconductor wafer with openings in the inhibition member described in claim 13, the first Group IVB crystal is made of Si1-a1Gea1 (where the proportion of Germanium 'a1' is between 0 and 1, inclusive). The second Group IVB crystal is made of Si1-a2Gea2 (where the proportion of Germanium 'a2' is between 0.6 and 1, inclusive), meaning it has a higher concentration of Germanium than the first.
15. The semiconductor wafer according to claim 13 , wherein the surface of the third Group IVB semiconductor crystal, the surface of the first Group IVB semiconductor crystal, and the surface of the Group III-V compound semiconductor crystal are located on substantially the same plane.
In the semiconductor wafer with openings in the inhibition member described in claim 13, the surfaces of the first Group IVB crystal, the third Group IVB crystal, and the Group III-V crystal are all located on approximately the same plane. This planar arrangement simplifies subsequent processing and improves overall device performance.
16. The semiconductor wafer according to claim 13 , wherein the second Group IVB semiconductor crystal is thinner than the first Group IVB semiconductor crystal.
In the semiconductor wafer with openings in the inhibition member described in claim 13, the second Group IVB crystal within the second opening is thinner than the first Group IVB crystal within the first opening. This accommodates the Group III-V crystal on top of it while maintaining a planar surface.
17. A semiconductor device, comprising an electronic element, the electronic element including: any semiconductor crystal among the silicon crystal, the first Group IVB semiconductor crystal, the second Group IVB semiconductor crystal, and the Group III-V compound semiconductor crystal of the semiconductor wafer according to claim 1 ; and an electrode located on the semiconductor crystal or on a semiconductor layer located on the semiconductor crystal.
A semiconductor device incorporates an electronic element. This element utilizes at least one of the semiconductor crystals from the wafer described in claim 1: the silicon base, the first Group IVB crystal, the second Group IVB crystal, or the Group III-V crystal. An electrode is placed on the crystal itself, or on a semiconductor layer grown on top of the crystal, to create a functional device.
18. A method for producing a semiconductor wafer, the method comprising; forming a first dent and a second dent in a silicon crystal of a base wafer that has the silicon crystal in a surface thereof; forming a first Group IVB semiconductor crystal in the first dent; forming a second Group IVB semiconductor crystal in the second dent; and forming a Group III-V compound semiconductor crystal above the second Group IVB semiconductor crystal in the second dent, wherein the first Group IVB semiconductor crystal and the Group III-V compound semiconductor crystal are exposed.
A method for producing a semiconductor wafer includes: creating two depressions (dents) in a silicon base wafer, forming a first Group IVB crystal in the first dent, forming a second Group IVB crystal in the second dent, and then growing a Group III-V crystal on top of the second Group IVB crystal in that second dent. The first Group IVB crystal and the Group III-V crystal are left exposed.
19. The method according to claim 18 for producing a semiconductor wafer, wherein the first Group IVB semiconductor crystal is a crystal of Si 1-a1 Ge a1 (0≦a1≦1), and the second Group IVB semiconductor crystal is a crystal of Si 1-a2 Ge a2 (0.6≦a2≦1).
In the method for producing a semiconductor wafer described in claim 18, the first Group IVB crystal is made of Si1-a1Gea1 (where the proportion of Germanium 'a1' is between 0 and 1, inclusive). The second Group IVB crystal is made of Si1-a2Gea2 (where the proportion of Germanium 'a2' is between 0.6 and 1, inclusive).
20. The method according to claim 18 for producing a semiconductor wafer, the method further comprising forming an inhibition member on the surface of the silicon crystal and on the side walls of the first dent and the second dent after forming the first dent and the second dent and before forming the first Group IVB semiconductor crystal and the second Group IVB semiconductor crystal, the inhibition member being to inhibit growth of a semiconductor crystal, wherein in the forming the first Group IVB semiconductor crystal and the second Group IVB semiconductor crystal, the first Group IVB semiconductor crystal and the second Group IVB semiconductor crystal are formed by a selective MOCVD method.
In the method for producing a semiconductor wafer described in claim 18, an "inhibition member" (material preventing crystal growth) is formed on the silicon surface and on the dent sidewalls *after* forming the dents, but *before* depositing the Group IVB crystals. The Group IVB crystals are then selectively grown using MOCVD (Metal-Organic Chemical Vapor Deposition) to ensure deposition only in the desired areas.
21. The method according to claim 18 for producing a semiconductor wafer, the method further comprising forming an inhibition member that covers the surface of the first Group IVB semiconductor crystal formed in the first dent and inhibits growth of a semiconductor crystal, wherein in the forming the Group compound semiconductor crystal, the Group III-V compound semiconductor crystal is formed by a selective MOCVD method.
In the method for producing a semiconductor wafer described in claim 18, after the first Group IVB crystal is grown in the first dent, a growth-inhibiting "inhibition member" is formed, covering the top surface of this crystal. Subsequently, the Group III-V crystal is grown on top of the second Group IVB crystal in the second dent using a selective MOCVD method, preventing unwanted deposition elsewhere.
22. A method for producing a semiconductor wafer, the method comprising: forming an inhibition member on a base wafer having a silicon crystal in a surface thereof, the inhibition member inhibiting growth of a semiconductor crystal; forming a first opening, a second opening, and a third opening in the inhibition member, the first opening leading to the silicon crystal, the second opening leading to the silicon crystal, and the third opening leading to the silicon crystal; forming a first Group IVB semiconductor crystal in the first opening; forming a second Group IVB semiconductor crystal in the second opening; fanning a Group III-V compound semiconductor crystal above the second Group IVB semiconductor crystal in the second opening; and growing a third Group IVB semiconductor crystal in the third opening, wherein the first Group IVB semiconductor crystal, the Group III-V compound semiconductor crystal, and the third Group IVB semiconductor crystal are exposed.
A method for producing a semiconductor wafer includes forming an "inhibition member" on a silicon base wafer to prevent crystal growth. Then, three openings are created in this member, exposing the silicon base. A first Group IVB crystal is grown in the first opening, a second Group IVB crystal in the second opening, and a Group III-V crystal is grown on top of the second Group IVB crystal in that same second opening. A third Group IVB crystal is grown in the third opening. The first, third Group IVB crystals, and the Group III-V crystal are exposed.
23. The method according to claim 22 for producing a semiconductor wafer, wherein the first Group IVB semiconductor crystal is a crystal of Si 1-a1 Ge a1 (0≦a1≦1), and the second Group IVB semiconductor crystal is a crystal of Si 1-a2 Ge a2 (0.6≦a2≦1).
In the method for producing a semiconductor wafer with openings in an inhibition member described in claim 22, the first Group IVB crystal is made of Si1-a1Gea1 (where the proportion of Germanium 'a1' is between 0 and 1, inclusive). The second Group IVB crystal is made of Si1-a2Gea2 (where the proportion of Germanium 'a2' is between 0.6 and 1, inclusive).
24. The method according to claim 22 for producing a semiconductor wafer, wherein the third Group IVB semiconductor crystal is a crystal of Si 1-b Ge b (0≦b≦1).
In the method for producing a semiconductor wafer with openings in an inhibition member as described in claim 22, the third Group IVB crystal is made of Si1-bGeb (where the proportion of Germanium 'b' is between 0 and 1, inclusive).
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June 13, 2012
August 13, 2013
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