A method of assembling an integrated circuit package is disclosed. The method comprises placing a die on a substrate of the integrated circuit package; coupling a plurality of wire bonds from a plurality of bond pads on the die to corresponding bond pads on the substrate; applying a non-conductive material to the plurality of wire bonds; and encapsulating the die and the plurality of wire bonds. An integrated circuit package is also disclosed.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method of assembling an integrated circuit package, the method comprising: placing a die on a substrate of the integrated circuit package; coupling a plurality of wire bonds from a plurality of bond pads on the die to corresponding bond pads on the substrate; applying a plurality of non-conductive coating elements to the plurality of wire bonds, wherein each non-conductive coating element of the plurality of non-conductive coating elements is applied to a corresponding individual wire bond of the plurality of wire bonds; and encapsulating the die and the plurality of wire bonds.
2. The method of claim 1 , further comprising curing the plurality of non-conductive coating elements by heating the non-conductive material.
3. The method of claim 1 , further comprising identifying one or more regions of wire bonds having a high density of wire bonds.
4. The method of claim 3 , wherein applying a plurality of non-conductive coating elements to the plurality of wire bonds comprises coating wire bonds in the one or more regions of wire bonds having a high density of wire bonds.
5. The method of claim 1 , wherein applying a plurality of non-conductive coating elements to the plurality of wire bonds comprises coating a first portion of the plurality of wire bonds in a first application.
6. The method of claim 5 , further comprising coating a second portion of the plurality of wire bonds with a second plurality of non-conductive coating elements in a second application.
7. The method of claim 6 , wherein coating a second portion of the plurality of wire bonds with a second plurality of non-conductive coating elements in a second application comprises coating the second portion of the plurality of wire bonds if the plurality of wire bonds exceeds a predetermined length.
8. A method of assembling an integrated circuit package, the method comprising: placing a die on a substrate of the integrated circuit package; coupling a plurality of wire bonds from a plurality of bond pads on the die to corresponding bond pads on the substrate; identifying a region of the plurality of wire bonds of an integrated circuit requiring protection against shorting; and selectively applying a plurality of non-conductive coating elements to the region of the plurality of wire bonds, wherein each non-conductive coating element of the plurality of non-conductive coating elements is applied to a corresponding individual wire bond of the plurality of wire bonds.
9. The method of claim 8 , further comprising curing the plurality of non-conductive coating elements by heating the plurality of non-conductive coating elements.
10. The method of claim 8 , wherein identifying a region of the plurality of wire bonds of an integrated circuit comprises identifying a region of the plurality of wire bonds having a predetermined density of wire bonds.
11. The method of claim 8 , wherein identifying a region of the plurality of wire bonds of an integrated circuit comprises identifying a region of the plurality of wire bonds having a predetermined length.
12. The method of claim 8 , wherein selectively applying a plurality of non-conductive coating elements to the region of the plurality of wire bonds comprises coating a first portion of the plurality of wire bonds with the plurality of non-conductive coating elements in a first application.
13. The method of claim 12 , further comprising coating a second portion of the plurality of wire bonds with a second plurality of non-conductive coating elements in a second application.
14. The method of claim 8 , further comprising encapsulating the die and the plurality of wire bonds.
15. An integrated circuit package, comprising: a substrate; at least one die positioned on the substrate; and a plurality of wire bonds coupling a plurality of bond pads on the at least one die to corresponding bond pads on the substrate; wherein at least a portion of the plurality of wire bonds are coated with a corresponding plurality of non-conductive coating elements to prevent shorting between wire bonds of the plurality of wire bonds, wherein each non-conductive coating element of the plurality of non-conductive coating elements is applied to a corresponding individual wire bond of the plurality of wire bonds.
16. The integrated circuit package of claim 15 , wherein the plurality of wire bonds is in a region of wire bonds having a predetermined density.
17. The integrated circuit package of claim 15 , wherein the at least a portion of the plurality of wire bonds is coated with a first coating on first segments of the plurality of wire bonds and with a second coating on second segments of the plurality of wire bonds.
18. The integrated circuit package of claim 15 , wherein, for each wire bond of the plurality of wire bonds having the non-conductive coating elements, a bead is formed on the wire bond.
19. The integrated circuit package of claim 15 , wherein the at least a portion of the plurality of wire bonds comprises a first plurality of wire bonds in a first region and a second plurality of wire bonds in a second region.
20. The integrated circuit package of claim 15 , wherein the non-conductive coating elements comprise an epoxy.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
January 10, 2012
September 17, 2013
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