An electronic component package includes a RDL pattern comprising a redistribution pattern terminal. A buildup dielectric layer is formed on the RDL pattern, the buildup dielectric layer having a redistribution pattern terminal aperture exposing the redistribution pattern terminal. An interconnection ball is formed within the redistribution pattern terminal aperture and on the redistribution pattern terminal. The interconnection ball includes an enclosed portion having an outer concave surface within the buildup dielectric layer. The angle of intersection between the outer concave surface of the interconnection ball and the redistribution pattern is less than 90°. This minimizes stress between the interconnection ball and the redistribution pattern which, in turn, minimizes failure of the bond between the interconnection ball and the redistribution pattern.
Legal claims defining the scope of protection, as filed with the USPTO.
1. An electronic component package comprising: a ReDistribution Line (RDL) pattern comprising a redistribution pattern terminal; a buildup dielectric layer coupled to the RDL pattern, the buildup dielectric layer comprising a redistribution pattern terminal aperture exposing the redistribution pattern terminal; and an interconnection ball within the redistribution pattern terminal aperture and coupled to the redistribution pattern terminal, the interconnection ball comprising an enclosed portion within the buildup dielectric layer, the enclosed portion comprising an outer concave surface, wherein the enclosed portion is cylindrical.
2. The electronic component package of claim 1 wherein an angle of intersection between the outer concave surface of the interconnection ball and the redistribution pattern is less than 90°.
3. The electronic component package of claim 1 wherein the interconnection ball further comprises an exposed portion exposed from the buildup dielectric layer.
4. The electronic component package of claim 3 wherein the exposed portion is spherical.
5. The electronic component package of claim 1 wherein the buildup dielectric layer comprises a dielectric material having an elongation of 100% and a cure temperature of 150-200° C.
6. The electronic component package of claim 1 further comprising: an electronic component comprising an active surface; and a first buildup dielectric layer coupled to the active surface, the buildup dielectric layer being a second buildup layer that is an entirely different layer than the first buildup dielectric layer, the first buildup dielectric layer comprising a dielectric material having an elongation of 100% and a cure temperature of 150-200° C., the RDL pattern being coupled to the first buildup dielectric.
7. The electronic component package of claim 6 wherein the second buildup dielectric layer has a thickness within the range of 15 microns (μm) to 40 μm.
8. The electronic component package of claim 7 wherein the thickness of the second buildup dielectric layer is 20 μm.
9. The electronic component package of claim 6 further comprising a bond pad coupled to the active surface, the first buildup dielectric layer comprising a first buildup dielectric layer bond pad aperture exposing the bond pad, wherein the RDL pattern is coupled to the bond pad through the first buildup dielectric layer bond pad aperture.
10. An electronic component package comprising: a ReDistribution Line (RDL) pattern comprising a redistribution pattern terminal; a buildup dielectric layer coupled to the RDL pattern, the buildup dielectric layer comprising a redistribution pattern terminal aperture exposing the redistribution pattern terminal; and an interconnection ball within the redistribution pattern terminal aperture and coupled to the redistribution pattern terminal, the interconnection ball comprising a cylindrical enclosed portion within the buildup dielectric layer, the enclosed portion comprising a protruding lip at the RDL pattern.
11. The electronic component package of claim 10 wherein the RDL pattern comprises: a first RDL layer; a second RDL layer coupled to the first RDL layer; and a third RDL layer coupled to the second RDL layer.
12. The electronic component package of claim 10 wherein the RDL pattern has a thickness of 9 microns (μm) and has a uniform thickness.
13. The electronic component package of claim 10 wherein a thickness of the buildup dielectric layer is less than 15% of a height that the interconnection ball protrudes above the buildup dielectric layer.
14. The electronic component package of claim 13 wherein the thickness of the buildup dielectric layer is 20 μm and the height that the interconnection ball protrudes above the buildup dielectric layer is within the range of 150 μm to 180 μm.
15. A method of forming an electronic component package comprising: forming a ReDistribution Line (RDL) pattern comprising a redistribution pattern terminal; applying a buildup dielectric layer to the RDL pattern; and patterning the buildup dielectric layer to form a redistribution pattern terminal aperture exposing the redistribution pattern terminal, the patterning comprises spraying the buildup dielectric layer with a buildup dielectric layer removal fluid at a pressure within the range of 100 pounds per square inch (PSI) to 1000 PSI.
16. The method of claim 15 wherein the pressure is 300 PSI.
17. The method of claim 15 wherein the buildup dielectric layer removal fluid comprises Propylene Glycol Methyl Ether Acetate (PGMEA).
18. The method of claim 15 wherein a wafer comprises singulation streets, the applying a buildup dielectric layer comprising applying the buildup dielectric layer to the singulation streets, the method further comprising: singulating the wafer and the buildup dielectric layer along the singulation streets.
19. The method of claim 15 further comprising: performing a solder ball reflow to form an interconnection ball within the redistribution pattern terminal aperture and coupled to the redistribution pattern terminal, wherein the buildup dielectric layer is cured during the solder ball reflow.
20. The method of claim 19 wherein the solder ball reflow comprises heating the electronic component package to 250° C. for one minute.
21. The method of claim 19 wherein the interconnection ball comprises an enclosed portion within the buildup dielectric layer, the enclosed portion comprising an outer concave surface.
22. The method of claim 19 wherein the interconnection ball comprises a protruding lip at the RDL pattern.
23. The method of claim 19 wherein a thickness of the buildup dielectric layer is less than 15% of a height that the interconnection ball protrudes above the buildup dielectric layer.
24. An electronic component package comprising: a ReDistribution Line (RDL) pattern comprising a redistribution pattern terminal; a buildup dielectric layer coupled to the RDL pattern, the buildup dielectric layer comprising a dielectric material having an elongation of 100% and a cure temperature of 150-200° C., the buildup dielectric layer comprising a redistribution pattern terminal aperture exposing the redistribution pattern terminal; and an interconnection ball within the redistribution pattern terminal aperture and coupled to the redistribution pattern terminal, wherein a thickness of the buildup dielectric layer is less than 15% of a height that the interconnection ball protrudes above the buildup dielectric layer.
25. The electronic component package of claim 24 wherein the thickness of the buildup dielectric layer is 20 μm and the height that the interconnection ball protrudes above the buildup dielectric layer is within the range of 150 μm to 180 μm.
26. An electronic component package comprising: a ReDistribution Line (RDL) pattern comprising a redistribution pattern terminal; and a buildup dielectric layer coupled to the RDL pattern, the buildup dielectric layer comprising a redistribution pattern terminal aperture exposing the redistribution pattern terminal, the redistribution pattern terminal aperture comprising a cylindrical concave sidewall.
27. The electronic component package of claim 26 wherein the redistribution pattern terminal aperture comprises a flared base at the redistribution pattern terminal.
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December 15, 2011
October 8, 2013
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