Doped graphene electronic materials

1. An electronic device, comprising: a graphene substrate including: an n-type defined region; a p-type defined region forming a junction with the n-type region; and an insulating-type region abutting at least one of the n-type defined region and the p-type defined region, wherein the n-type region is chemically functionalized with a first dopant species, the p-type defined region is chemically functionalized with a second dopant species, and the insulating-type region is chemically functionalized with a species that renders the insulating-type region more insulating than pristine graphene.

2. The device of claim 1 , wherein the graphene substrate further includes a neutral region having fewer free carriers than either the n-type defined region or the p-type defined region.

3. The device of claim 2 , wherein the neutral region is an insulator.

4. The device of claim 2 , wherein the neutral region is a semiconductor.

5. The device of claim 2 , wherein the neutral region is a metal.

6. The device of claim 1 , further comprising a first interconnect electrically connected to the n-type defined region and a second interconnect electrically connected to the p-type defined region.

7. The device of claim 1 , wherein the n-type defined region does not include a edge of the graphene substrate.

8. The device of claim 1 , wherein the p-type defined region does not include a edge of the graphene substrate.

9. The device of claim 1 , further comprising a third defined region differing in at least one electronic property from each of the n-type defined region and the p-type defined region.

10. The device of claim 9 , wherein the third defined region is chemically functionalized with a third dopant species, wherein the third dopant species is a different species than the first dopant species and the second dopant species.

11. The device of claim 1 , wherein the first dopant species and the second dopant species functionalize opposing surfaces of the graphene substrate.

12. The device of claim 1 , wherein the second dopant species differs from the first dopant species.

13. The device of claim 1 , wherein the first dopant species includes a first bound moiety affixed to the graphene substrate and a first free moiety removably attached to the first bound moiety.

14. The device of claim 13 , wherein a difference in an electronic property of the graphene substrate is a function of a property of the free moiety.

15. The device of claim 1 , wherein the first dopant species varies in attachment pattern within the n-type defined region.

16. The device of claim 1 , wherein the second dopant species varies in attachment pattern within the p-type defined region.

17. The device of claim 1 , wherein the n-type defined region and the p-type defined region are parts of a component including a diode, a transistor, a switch, a resistor, a capacitor, an inductor, a sensor, and an interconnect.

18. The device of claim 1 , wherein the graphene substrate comprises a single layer.

19. The device of claim 1 , wherein the graphene substrate comprises multiple layers.

20. The device of claim 1 , wherein the graphene substrate is disposed on a base substrate.

21. The device of claim 20 , wherein the base substrate is graphite.

22. The device of claim 20 , wherein the base substrate is a crystal containing at least one element other than carbon.

23. The device of claim 1 , wherein the first dopant species and the second dopant species functionalize a common surface of the graphene substrate.

24. An electronic circuit, comprising: a first device including: a first junction between a first n-type defined region in a graphene substrate and a first p-type defined region in the graphene substrate; and an insulating-type region in the graphene substrate abutting at least one of the first n-type defined region and the first p-type defined region, wherein the first n-type region is chemically functionalized with a first dopant species, the first p-type defined region is chemically functionalized with a second dopant species, and the insulating-type region is chemically functionalized with a species that renders the insulating-type region more insulating than pristine graphene; and a second device including a second junction between a second n-type defined region in the graphene substrate and a second p-type defined region in the graphene substrate, wherein the second n-type region is chemically functionalized with a third dopant species and the second p-type defined region is chemically functionalized with a fourth dopant species.

25. The circuit of claim 24 , wherein the first and second devices have a same electronic character.

26. The circuit of claim 24 , further comprising a fifth defined region of the graphene substrate that functions as an interconnect between the first and second devices.

27. The device of claim 24 , wherein the first n-type defined region does not include an edge of the graphene substrate.

28. The device of claim 27 , wherein the first p-type defined region does not include an edge of the graphene substrate.

29. The device of claim 24 , wherein the first dopant species and the second dopant species functionalize opposing surfaces of the graphene substrate.

30. The device of claim 24 , wherein the first device and the second device are positioned on opposing surfaces of the graphene substrate.

31. The device of claim 24 , wherein the first dopant species includes a first bound moiety affixed to the graphene substrate and a first free moiety removably attached to the first bound moiety.

32. The device of claim 24 , wherein the first dopant species varies in concentration within the n-type defined region.

33. The device of claim 24 , wherein the second dopant species varies in concentration within the p-type defined region.