Patentable/Patents/US-8580682
US-8580682

Cost-effective TSV formation

PublishedNovember 12, 2013
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

A device includes a substrate having a first surface, and a second surface opposite the first surface. A through-substrate via (TSV) extends from the first surface to the second surface of the substrate. A dielectric layer is disposed over the substrate. A metal pad is disposed in the dielectric layer and physically contacting the TSV, wherein the metal pad and the TSV are formed of a same material, and wherein no layer formed of a material different from the same material is between and spacing the TSV and the metal pad apart from each other.

Patent Claims
18 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A method comprising: providing a substrate having a major surface; forming a dielectric layer over the major surface; forming a first opening in the substrate; forming a second opening in the dielectric layer, wherein the first and the second openings are aligned along a common axis orthogonal to the major surface and have different horizontal dimensions; after the step of forming the first opening and before the step of forming the second opening, forming a dielectric liner on surfaces of the substrate exposed to the first opening; filling the first and the second openings with a metallic material, wherein the metallic material is continuous; and performing a planarization on the metallic material to remove excess portions of the metallic material above a top surface of the dielectric layer, wherein remaining portions of the metallic material form a through-substrate via (TSV) in the first opening, and a first metal pad in the second opening.

2

2. The method of claim 1 further comprising, before the step of filling the metallic material, forming a diffusion barrier on sidewalls of the first and the second openings.

3

3. The method of claim 1 further comprising, before the step of forming the dielectric layer, forming an isolation layer over and contacting a top surface of the substrate.

4

4. The method of claim 1 , wherein the step of forming the dielectric layer is performed after the step of forming the first opening, and wherein the method further comprises, after the step of forming the first opening and before the step of forming the dielectric layer, forming a dielectric liner on sidewalls of the first opening and on a top surface of the substrate.

5

5. The method of claim 1 further comprising, after the step of performing the planarization: grinding the substrate until the TSV is exposed; forming a diffusion barrier layer contacting the TSV; and forming a second metal pad contacting the diffusion barrier layer and electrically coupled to the TSV.

6

6. The method of claim 1 further comprising: at a time the step of forming the second opening is performed, simultaneously forming a trench in the dielectric layer, wherein the metallic material is filled into the trench, and wherein after the step of performing the planarization on the metallic material, a metal line is formed in the trench.

7

7. The method of claim 1 , wherein the substrate is a semiconductor substrate, and wherein the first metal pad is in a first metal layer, the first metal layer being immediately over an inter-layer dielectric.

8

8. The method of claim 1 , wherein the substrate is a semiconductor substrate, and wherein no active device is formed on any surface of the substrate.

9

9. The method of claim 1 , wherein the substrate is a dielectric substrate.

10

10. A method comprising: providing a substrate; forming an isolation layer over the substrate; forming a first dielectric layer over the isolation layer; forming a first opening extending from a top surface of the first dielectric layer into the substrate; partially filling the first opening with a sacrificial material; after the partially filling the first opening, etching the first dielectric layer to expand the first opening in the first dielectric layer into a second opening; forming a first diffusion barrier layer on sidewalls of the first and the second openings; completely filling a remainder of the first and the second openings with a metallic material over the first diffusion barrier layer; and performing a planarization on the metallic material to remove excess portions of the metallic material above a top surface of the first dielectric layer to form a through-substrate via (TSV) in the first opening, and a first metal pad in the second opening.

11

11. The method of claim 10 further comprising, before the step of forming the first dielectric layer, performing a thermal oxidation to form an oxide liner in the first opening.

12

12. The method of claim 10 , wherein the TSV extends into an intermediate level of the substrate, and wherein the method further comprises, after the step of performing the planarization: grinding the substrate until the TSV is exposed; forming a second diffusion barrier layer contacting the TSV; and forming a second metal pad contacting the second diffusion barrier layer and electrically coupled to the TSV.

13

13. The method of claim 10 further comprising: before the step of forming the first opening, forming a second dielectric layer, wherein the first and the second dielectric layers are on opposite sides of the substrate; forming a second diffusion barrier layer in the second dielectric layer; and forming a second metal pad in the second dielectric layer and contacting the second diffusion barrier layer, wherein during the step of forming the first opening, the second diffusion barrier layer is used as an etch stop layer.

14

14. The method of claim 10 further comprising: at a time the step of etching the dielectric layer to expand the first opening is performed, simultaneously forming a trench in the dielectric layer, wherein the metallic material is filled into the trench in the step of filling the metallic material, and wherein after the step of performing the planarization, a metal line is formed in the trench.

15

15. The method of claim 10 , wherein the substrate is a semiconductor substrate, and wherein the first metal pad is in a first metal layer, the first metal layer being immediately over an inter-layer dielectric.

16

16. The method of claim 10 , wherein the substrate is a semiconductor substrate, and wherein no active device is formed on any surface of the substrate.

17

17. The method of claim 10 , wherein the substrate is a dielectric substrate.

18

18. The method of claim 10 wherein the sacrificial material is a first portion of a photoresist material and wherein a second portion of the photoresist material is used as a mask during the step forming the second opening in the dielectric layer.

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Patent Metadata

Filing Date

September 30, 2010

Publication Date

November 12, 2013

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Cite as: Patentable. “Cost-effective TSV formation” (US-8580682). https://patentable.app/patents/US-8580682

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