A silicon substrate having a first silicon oxide film formed via thermal oxidation and a second silicon oxide film formed via chemical vapor deposition and the like is subjected to preprocessing prior to selective epitaxial growth, wherein both the first and second silicon oxide films are etched with the same etching rate so as to completely remove the first silicon oxide film. Thus, it is possible to precisely control the sizes of contact holes formed in the silicon substrate, thus preventing contact plugs from short-circuiting with silicon epitaxial layers.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A manufacturing method of a semiconductor device, comprising: forming a contact hole in an interlayer insulating film over a semiconductor substrate, to expose a surface of the semiconductor substrate, whereby a natural oxide film is formed on the exposed surface of the semiconductor substrate; placing the semiconductor substrate on which the natural oxide film is formed, in a mixed gas including ammonia and HF at a temperature of less than 50° C., to form a silicon ammonium fluoride on the surface of the semiconductor substrate by reacting the natural oxide film with the ammonia and the HF; placing the semiconductor substrate on which the silicon ammonium fluoride is formed in an inert gas at a temperature higher than 100° C., to remove the silicon ammonium fluoride on the surface of the semiconductor substrate, resulting in removing the natural oxide film on the surface of the semiconductor substrate; and embedding a conductor in the contact hole to form a contact plug after removing the natural oxide film on the surface of the semiconductor substrate.
2. The method as claimed in claim 1 , further comprising: forming at least one of source and drain regions on the semiconductor substrate; and wherein the contact hole is formed to expose the one of source and drain regions.
3. The method as claimed in claim 2 , further comprising: forming a gate electrode over the semiconductor substrate; forming a second contact hole in the interlayer insulating film to expose a surface of the gate electrode; and forming a second contact plug in the second contact hole.
4. The method as claimed in claim 3 , further comprising: forming a second interlayer insulating film on the first interlayer insulating film after forming the first and second contact plugs; forming a third contact hole in the second interlayer insulating film to expose a surface of the second contact plug, whereby another natural oxide film is formed on the exposed surface of the second contact plug; placing the semiconductor substrate on which the third contact hole is formed, in the mixed gas including ammonia and HF at a temperature less than 50° C., to form the silicon ammonium fluoride on the surface of the second contact plug by reacting the another natural oxide film on the second contact plug with the ammonia and the HF; and placing the semiconductor substrate on which the silicon ammonium fluoride is formed on the second contact plug in an inert gas at a temperature higher than 100° C., to remove the silicon ammonium fluoride on the surface of the second contact plug, resulting in removing the another natural oxide film on the second contact plug.
5. The method as claimed in claim 4 , wherein the silicon ammonium fluoride is removed by sublimating the silicon ammonium fluoride.
6. The method as claimed in claim 1 , wherein the HF of the mixed gas is hydrofluoric anhydride.
7. The method as claimed in claim 4 , wherein the HF of the mixed gas is hydrofluoric anhydride.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
February 13, 2009
December 10, 2013
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