A buck converter comprising a controller arranged to monitor an output voltage of the converter, the controller comprising: a comparator arranged to compare an output voltage at an output of the buck converter with a reference voltage, and a modification circuit within the comparator or connected to a modification signal input of the comparator and arranged to produce a correction signal to modify the operation of the comparator.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A buck converter that includes an inductor, a first capacitor having an internal first series resistor having a first value and a controller arranged to monitor an output voltage of the converter, the controller comprising: a comparator that includes a differential pair that includes a first field effect transistor, a second field effect transistor and a current control device, wherein a source of the first field effect transistor is coupled to a source of the second field effect transistor and to the first current control device, and wherein the first and second field effect transistors are arranged to compare a feedback signal representative of an output voltage at an output of the buck converter with a reference voltage, and a modification circuit that includes an integrator, and converting circuitry that includes at least one field effect transistor, wherein the integrator is coupled to produce a voltage in response to voltage changes at a first terminal of the inductor, wherein the converting circuitry is coupled so as to convert the voltage to a correction current and to couple the correction current to at least one of the first and second field effect transistors so as to modify current flowing through at least one of the first and second field effect transistors to dampen out potential instability.
2. The buck converter as claimed in claim 1 , further comprising a switching arrangement for selectively connecting the first terminal of the inductor to a first voltage or to a second voltage; and wherein the first capacitor is connected to second terminal of the inductor.
3. The buck converter as claimed in claim 2 , in which the produced voltage includes a ripple that represents the voltage at the first terminal of the inductor and the correction current includes a corresponding ripple current.
4. The buck converter as claimed in claim 3 , in which the modification circuit emulates the current flowing in the inductor.
5. The buck converter as claimed in claim 4 , in which the modification circuit integrates an input signal so as to emulate the current flowing in the inductor.
6. The buck converter as claimed in claim 5 , in which the modification circuit scales the emulated current or the integral thereof.
7. The buck converter as claimed in claim 6 , in which the current flowing in the inductor is emulated by at least one of a current source and a current sink arranged to charge and discharge a second capacitor.
8. The buck converter as claimed in claim 2 , further including a frequency controller arranged to modify a switching frequency of the switching arrangement.
9. The buck converter as claimed in claim 2 , in which the modification circuit further includes a scaling circuit for applying a scaling factor to the modification circuit input signal or to an output of the integrator.
10. The buck converter of claim 1 , wherein the integrator includes a second capacitor and a second resistor; and wherein a time constant of the integrator is matched to a time constant of the inductor and an equivalent internal first series resistor having a second value larger than the first value.
11. The buck converter as claimed in claim 1 , in which the first and second field effect transistors each exhibit a first transconductance.
12. The buck converter as claimed in claim 1 , in which the comparator exhibits hysteresis.
13. A buck converter comprising a controller arranged to monitor an output voltage of the converter, the controller comprising: a comparator that includes a differential input stage, comprising first and second field effect transistors each exhibiting a first transconductance, wherein the first and second transistors are arranged to compare a feedback signal representative of an output voltage at an output of the buck converter with a reference voltage, a modification circuit within the comparator or connected to a modification signal input of the comparator and that includes a current source or current sink in series with a third field effect transistor having a transconductance, wherein the third field effect transistor has its gate arranged to receive an integrated version of the modification circuit input signal; and a node between the current source or current sink and the third field effect transistor is connected to a drain of one of the first and second field effect transistors to produce a correction signal to modify a current flowing through at least one of the first and second transistors so as to modify the operation of the comparator.
14. A buck converter comprising: a controller arranged to monitor an output voltage of the converter, the controller comprising: an inductor, a switching arrangement for selectively connecting a first terminal of the inductor to a first voltage or to a second voltage; a storage element connected to a second terminal of the inductor; a comparator arranged to compare a feedback signal representative of an output voltage at an output of the buck converter with a reference voltage; a modification circuit within the comparator connected to a modification signal input of the comparator and arranged to produce a correction signal to modify the operation of the comparator; a frequency controller arranged to modify a switching frequency of the switching arrangement; and a frequency or phase comparator arranged to control current to be selectively added to or removed from an output of the a comparator where the comparator outputs a current as a function of a voltage difference between the feedback voltage of the converter and the reference voltage.
15. The buck converter as claimed in claim 14 , further comprising a controllable current flow device to deliver current to an output node of the converter stage.
16. The buck converter as claimed in claim 14 , further comprising a controllable current flow device to remove current from an output node of the comparator stage.
17. The buck converter as claimed in claim 14 , in which the comparator comprises a differential pair, and a current control device is connected to each arm of the differential pair and enabled or disabled in accordance with a switching signal generated by the differential pair.
18. A voltage converter having a comparator that includes a differential input stage, comprising first and second field effect transistors each exhibiting a first transconductance, wherein the first and second transistors are arranged to compare a feedback signal representative of an output voltage at an output of the buck converter with a reference voltage, and further comprising a frequency controller arranged to monitor a switching frequency of the voltage converter, and to produce a correction signal to modify a current flowing through at least one of the first and second transistors so as to modify the operation of the comparator to vary hysteresis within the comparator so as to control the switching rate.
19. The voltage converter as claimed in claim 18 , further comprising an inductor having a first end connected to a switching arrangement and a second end connected to a converter output, and wherein the switching arrangement is arranged to connect the first end of the inductor to a first voltage rail or a second voltage rail in response to an output of the comparator.
20. The voltage converter as claimed in claim 18 , in which the voltage converter is a buck converter.
21. A method of stabilizing a hysteretic buck converter, the method comprising: using a comparator, to monitor a switch signal to a switching arrangement of the buck converter: wherein the comparator includes a differential input stage comprising first and second field effect transistors each exhibiting a first transconductance, wherein the transistors of the differential input stage are arranged to compare a feedback signal representative of the output voltage of the buck converter with a reference voltage and to generate the switch signal; and generating a modification signal that is coupled to modify a current flowing through at least one of the first and second transistors so as to modify the operation of a comparator and vary hysteresis within the comparator.
22. The method as claimed in claim 21 , in which the modification signal is formed by monitoring or emulating the signals applied by a switching circuit to a first terminal of an inductor.
23. The method as claimed in claim 22 , in which the monitored or emulated signals are integrated and scaled to generate the modification signal.
24. A method as claimed in claim 21 , further comprising the step of modifying the modification signal or forming further modification signals so as to control a frequency of the switch signal.
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May 20, 2011
March 4, 2014
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