A disclosed semiconductor device includes a wiring board, a semiconductor element mounted on a principal surface of the wiring board with flip chip mounting, a first conductive pattern formed on the principal surface along at least an edge portion of the semiconductor element, a second conductive pattern formed on the principal surface along the first conductive pattern and away from the first conductive pattern, a passive element bridging between the first conductive pattern and the second conductive pattern on the principal surface of the wiring board, and a resin layer filling a space between the wiring board and the semiconductor chip, wherein the resin layer extends between the semiconductor element and the first conductive pattern on the principal surface of the wiring board.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A manufacturing method of a semiconductor device comprising: forming a first conductive pattern and a second conductive pattern in a vicinity of a mounting region of a semiconductor element on a principal surface of a wiring board; arranging a passive element to bridge between the first conductive pattern and the second conductive pattern; mounting the semiconductor element on the mounting region of the semiconductor element with flip chip mounting; and supplying a resin on the mounting region of the semiconductor element.
2. A manufacturing method of a semiconductor device comprising: forming a first conductive pattern and a second conductive pattern in a vicinity of a mounting region of a semiconductor element on a principal surface of the wiring board; arranging a passive element to bridge between the first conductive pattern and the second conductive pattern; coating the mounting region with a resin; and mounting the semiconductor element on the mounting region of the semiconductor element with flip chip mounting.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
April 9, 2012
March 18, 2014
Browse 5M+ US patents with plain-English claim translations and AI-generated analysis.