A semiconductor processing method that can generate a hole with different diameters, comprising: providing first material and second material different from the first material; and utilizing a etching process to etch the first material and the second material to form a hole through the first material and the second material; wherein the etching process has different etching rates for the first material and the second material such that the hole have different diameters. A semiconductor structure corresponding to the above-mentioned method is also disclosed.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A semiconductor processing method that can generate a single hole with different diameters, comprising: providing first material and second material different from the first material; and utilizing a single etching process to etch the first material and the second material to form a single hole through the first material and the second material; wherein the single etching process has different etching rates for the first material and the second material such that the single hole have different diameters; where the single hole includes a second portion, and a third portion under the second portion; wherein the third portion has a diameter smaller than the second portion; where the second portion touches both the first material and the second material, and the third portion only touches the second material.
2. The semiconductor processing method of claim 1 , wherein the first material is surrounded by the second material.
3. The semiconductor processing method of claim 1 , wherein the first material is nitride, and the second material is oxide.
4. The semiconductor processing method of claim 1 , further comprising: providing a target device before providing the first material and the second material; and providing a metal line above the second material, which can be contacted to the target device via the single hole.
5. The semiconductor processing method of claim 1 , where the single hole further includes a first portion above the second portion; wherein the second portion has a diameter smaller than the first portion; where the first portion only touches the second material.
6. The semiconductor processing method of claim 1 , wherein the diameter of the second portion gradually decreases from top to bottom.
7. A semiconductor structure having a single hole with different diameters, comprising: first material; second material different from the first material; and a single hole with different diameters, through the first material and the second material, wherein the single hole is formed by a single etching process etching the first material and the second material, wherein the single etching process has a smaller etching rate for the first material than for the second material; where the single hole includes a second portion, and a third portion under the second portion; wherein the third portion has a diameter smaller than the second portion; where the second portion touches both the first material and the second material, and the third portion only touches the second material.
8. The semiconductor structure of claim 7 , wherein the first material is surrounded by the second material.
9. The semiconductor structure of claim 7 , wherein the first material is nitride, and the second material is oxide.
10. The semiconductor structure of claim 7 , further comprising: a target device under the first material and the second material; and a metal line above the second material, which can be contacted to the target device via the single hole.
11. The semiconductor structure of claim 7 , where the single hole further includes a first portion above the second portion; wherein the second portion has a diameter smaller than the first portion; where the first portion only touches the second material.
12. The semiconductor structure of claim 7 , wherein the diameter of the second portion gradually decreases from top to bottom.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
May 31, 2012
July 8, 2014
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