A nonvolatile memory device includes a cell array including a plurality of pages, a selection unit configured to select one of the pages in response to a page selection address, an operation control unit configured to read data of a given number of pages adjacent to the selected page and output the read data as backup data, to erase data of the selected page, in response to a page erase command, and to reprogram update data and the backup data in the selected page and the adjacent pages, respectively, and a data storage unit configured to store the backup data.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A nonvolatile memory device comprising: a cell array including a plurality of pages; a selection unit configured to select one of the pages in response to a page selection address; an operation control unit configured to read data of a given number of pages adjacent to the selected page and output the read data as backup data, to erase data of the selected page, in response to a page erase command, and to reprogram update data and the backup data in the selected page and the adjacent pages, respectively; and a data storage unit configured to store the backup data.
2. The nonvolatile memory device of claim 1 , wherein the operation control unit comprises: a bias voltage providing section configured to sequentially supply an erase bias voltage and a program bias voltage to a word line corresponding to the selected page, and to sequentially supply a read bias voltage and the program bias voltage to a given number of word lines corresponding to the adjacent pages, in response to the page erase command; and a page buffering section configured to read data in a period, in which the read bias voltage is provided to the adjacent pages, in units of pages, to output the read data as the backup data, and to receive and program the update data and the backup data in units of pages in a period in which the program bias voltage is provided to the selected page and the adjacent pages.
3. The nonvolatile memory device of claim 2 , wherein the bias voltage providing section is configured to supply the read bias voltage to the given number of word lines corresponding to the adjacent pages at non-overlapping time points, to supply the erase bias voltage to the word line corresponding to the selected page, and to supply the program bias voltage to the word line corresponding to the selected page and the given number of word lines corresponding to the adjacent pages at non-overlapping time points.
4. The nonvolatile memory device of claim 2 , wherein the page buffering section is configured to read data in units of pages, which are stored in the adjacent pages when the read bias voltage is supplied to the given number of word lines corresponding to the adjacent pages, and output the read data as the backup data, and configured to receive the update data and the backup data in units of pages when the program bias voltage is supplied to the word line corresponding to the selected page and the given number of word lines corresponding to the adjacent pages and program the received data in the pages.
5. The nonvolatile memory device of claim 1 , wherein the cell array comprises a plurality of cell blocks, each cell block including a given number of pages divided by strings.
6. The nonvolatile memory device of claim 5 , wherein the selection unit is configured to select one of the cell blocks in response to a block selection address so as to simultaneously select a given number of pages included in the selected cell block.
7. The nonvolatile memory device of claim 6 , wherein the operation control unit is configured to read data of pages, except for the selected page among the given number of pages included in the selected cell block, in response to a block erase command, to output the read data as the backup data, to simultaneously erase the given number of pages included in the selected cell block, and to reprogram the update data and the backup data in the given number of pages included in the selected cell block.
8. The nonvolatile memory device of claim 7 , wherein the data storage unit comprises: a plurality of registers configured to store data of the adjacent pages, or data of pages except for the selected page among the given number of pages included in the selected cell block, in units of pages.
9. The nonvolatile memory device of claim 1 , wherein the update data is input from an exterior in units of pages and is newly programmed in the selected page.
10. A nonvolatile memory device comprising: a cell array including a plurality of word lines, each constituting a given number of pages; a selection unit configured to select one of the word lines, which includes a page selected in response to a page selection address; an operation control unit configured to read data of a given number of word lines adjacent to the selected word line and output the read data as backup data, to erase data of the selected word line, in response to a page erase command, and to reprogram update data and the backup data in the selected word line and the adjacent word lines, respectively; and a data storage unit configured to store the backup data.
11. The nonvolatile memory device of claim 10 , wherein the operation control unit comprises: a bias voltage providing section configured to sequentially supply an erase bias voltage and a program bias voltage to the selected word line, and to sequentially supply a read bias voltage and the program bias voltage to the adjacent word lines, in response to the page erase command; and a page buffering section configured to read data in a period, in which the read bias voltage is provided to a given number of pages included in the adjacent word lines, in units of pages, to output the read data as the backup data, and to receive and program the update data and the backup data in units of pages in a period in which the program bias voltage is provided to the selected word line and the given number of pages included in the adjacent word lines.
12. The nonvolatile memory device of claim 11 , wherein the bias voltage providing section is configured to supply the read bias voltage to the adjacent word lines at non-overlapping time points, to supply the erase bias voltage to the selected word line, and to supply the program bias voltage to the selected word line and the adjacent word lines at non-overlapping time points.
13. The nonvolatile memory device of claim 11 , wherein the page buffering section is configured to read data in units of pages, which are stored in the given number of pages included in the adjacent word lines when the read bias voltage is supplied to the adjacent word lines, and output the read data as the backup data, to receive the update data and the backup data in units of pages when the program bias voltage is supplied to the selected word line and the adjacent word lines, and to program the received data in the given number of pages included in the word lines.
14. The nonvolatile memory device of claim 10 , wherein the cell array comprises a plurality of cell blocks, each cell block including a given number of pages divided by strings.
15. The nonvolatile memory device of claim 14 , wherein the selection unit is configured to select one of the plurality of cell blocks in response to a block selection address so as to simultaneously select a given number of word lines included in the selected cell block.
16. The nonvolatile memory device of claim 15 , wherein the operation control unit is configured to read data of word lines, except for the selected word line among the given number of word lines included in the selected cell block, in response to a block erase command, to output the read data as the backup data, to simultaneously erase the given number of word lines included in the selected cell block, and to reprogram the update data and the backup data in the given number of word lines included in the selected cell block.
17. The nonvolatile memory device of claim 16 , wherein the data storage unit comprises: a plurality of registers configured to store data of the adjacent word lines, or data of word lines, except for the selected word line among the given number of word lines included in the selected cell block, in units of pages.
18. The nonvolatile memory device of claim 10 , wherein the update data is input from an exterior in units of pages and is newly programmed in the selected word line.
19. A nonvolatile memory system comprising: a nonvolatile memory device configured to support an erase operation in units of pages, to output data of a given number of pages adjacent to a selected page to be erased as backup data in response to a page erase command, to perform the erase operation for the selected page, and to reprogram update data and the backup data in the selected page and the adjacent pages, respectively; and an auxiliary memory device configured to store the backup data.
20. The nonvolatile memory system of claim 19 , wherein the nonvolatile memory device comprises: a cell array including a plurality of pages; a selection unit configured to select one of the plurality of pages as the selected page in response to a page selection address; a bias voltage providing section configured to sequentially supply an erase bias voltage and a program bias voltage to a word line corresponding to the selected page, and to sequentially supply a read bias voltage and the program bias voltage to a given number of word lines corresponding to the adjacent pages, in response to the page erase command; and a page buffering section configured to read data in a period, in which the read bias voltage is provided to the adjacent pages, in units of pages, to output the read data as the backup data, and to receive and program the update data and the backup data in units of pages in a period in which the program bias voltage is provided to the selected page and the adjacent pages.
21. The nonvolatile memory system of claim 20 , wherein the auxiliary memory device comprises: a plurality of memory cells configured to store data of the adjacent pages adjacent to the selected page in units of pages.
22. The nonvolatile memory system of claim 19 , wherein the nonvolatile memory device comprises: a cell array including a plurality of word lines, each constituting a given number of pages; a selection unit configured to select one of the word lines, which includes the selected page in response to a page selection address; a bias voltage providing section configured to sequentially supply an erase bias voltage and a program bias voltage to the selected word line, and to sequentially supply a read bias voltage and the program bias voltage to a given number of word lines adjacent to the selected word line, in response to the page erase command; and a page buffering section configured to read data in a period, in which the read bias voltage is provided to the adjacent word lines, in units of pages, to output the read data as the backup data, and to receive and program the update data and the backup data in units of pages in a period in which the program bias voltage is provided to the selected word line and the adjacent word lines.
23. The nonvolatile memory system of claim 22 , wherein the auxiliary memory device comprises: a plurality of memory cells configured to store data of the adjacent word lines in units of pages.
24. The nonvolatile memory system of claim 19 , wherein the nonvolatile memory device is configured to support an erase operation in units of blocks, to output data, except for data of the selected page, among data of a block to be erased as the backup data in response to a block erase command, to perform the erase operation for the block to be erased, and to reprogram the update data and the backup data in the block to be erased.
25. The nonvolatile memory system of claim 19 , wherein the update data is input to the nonvolatile memory device through a controller in units of pages and is newly programmed in the page to be erased.
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March 13, 2013
September 23, 2014
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