A high speed transmit driver is provided, along with methods to improve driver slew rate, decrease transmit jitter, improve termination accuracy, and decrease sensitivity to supply noise.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A high-speed transmit driver comprising: at least one inverter with a series capacitor at the inverter output; and at least one mutiplex block to turn off the at least one inverter in applications that do not require a very large slew rate.
2. The high-speed transmit driver of claim 1 , wherein applications that do not require a very large slew rate comprise applications with a data rate of less than 14 Gbp/s.
3. The high-speed transmit driver of claim 1 , wherein a source series terminated driver architecture is used.
4. The high-speed transmit driver of claim 1 , further comprising a controllable delay stage to maximize the driver slew rate.
5. A method of increasing the slew rate of a high-speed transmit driver comprising: receiving a driver input signal at the driver; feeding a portion of the driver input signal directly to a driver output through a feedforward path comprising a capacitive impedance network; and matching the delay of the feedforward path with the components of the driver that do not employ the feedforward path.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
October 24, 2012
November 4, 2014
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