Patentable/Patents/US-8898380
US-8898380

Memory efficient check of raid information

PublishedNovember 25, 2014
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

Disclosed is a RAID data checking system. I/O controllers to read data RAID data from the storage devices and transfer that data to virtual memory address ranges. The P+Q checking function receives the data sent to the virtual memory address ranges. However, instead of storing the incoming data, the P+Q checking function updates intermediate values of the P and Q redundant data calculations associated with the incoming data. When all of the strips have been received, the P+Q checking function will have completed the calculation of P and Q redundant data. In this case, after all the strips and the P or Q data have been received, the P+Q checking function will hold zeroes if all the data and the P and Q data was correct and hold non-zero values if there was an error.

Patent Claims
8 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A system for checking RAID information, comprising: an address compare that determines whether a first address on a system bus corresponds to a predefined data range, a predefined RAID P-data range or a predefined RAID Q-data range, wherein said address compare respectively generates one of a HITD, HITP or HITQ signal in response to the first address being within the predefined data range, the predefined RAID P-data range or the predefined RAID Q-data range; a RAID P-data accumulator that stores, in response to the receipt of the HITD or HITP signal, a first result of an exclusive-OR of data stored in said RAID P-data accumulator and data received from said system bus, said data received from said system bus being sent to said first address on said system bus; a constant selector that, in response to the receipt of the HITD or HITQ signal and based on said first address on said system bus, selects one of a set of constants that corresponds to said data received from said system bus; and, a RAID Q-data accumulator that stores, in response to the receipt of the HITD or HITQ signal, a second result of an exclusive-OR of data stored in said RAID Q-data accumulator and a third result of a Galois field multiplication of said one of said set of constants and said data received from said system bus.

2

2. The system of claim 1 , further comprising a completion detector that determines when a set of data has been received from said system bus.

3

3. The system of claim 2 , wherein said set of data comprises a plurality of data blocks that comprise a RAID data stripe that comprises RAID P-data and RAID Q-data.

4

4. A method of checking RAID information, comprising: controlling a plurality of storage devices to provide a plurality of RAID strips, said plurality of RAID strips being sent to a plurality of virtual buffers; receiving said plurality of RAID strips; and, a virtual buffer compare that compares an address presented on a system bus with a predefined data range, a predefined RAID P-data range and a predefined RAID Q-data range, wherein said virtual buffer compare respectively generates one of a HITD, HITP or HITQ signal in response to the address being within the predefined data range, the predefined RAID P-data range or the predefined RAID Q-data range; accumulating a plurality of P-data values, in response to the receipt of the HITD or HITP signal, corresponding to each of said plurality of virtual buffers and accumulating a plurality of Q-data values in response to the receipt of the HITD or HITQ signal corresponding to each of said plurality of virtual buffers, said plurality of P-data values and said plurality of Q-data values corresponding to said plurality of RAID strips received for each of said plurality of virtual buffers, wherein said plurality of Q-data values are based on a plurality of constants that are selected in response to the receipt of the HITD or HITQ signal and based on a corresponding which one of said plurality of virtual buffers that each of said plurality of RAID strips was sent to, the one of said plurality of virtual buffers that a RAID strip is sent to specified by the address presented on said system bus.

5

5. The method of claim 4 , further comprising: controlling a storage device to provide a RAID P-data strip, said RAID P-data strip being sent to a P-data virtual buffer; receiving said RAID P-data strip; and, based on said result of accumulating said RAID P-data strip with at least one of said plurality of P-data values, determining an error condition.

6

6. The method of claim 4 , further comprising: controlling a storage device to provide a RAID Q-data strip, said RAID Q-data strip being sent to a Q-data virtual buffer; receiving said RAID Q-data strip; and, based on said result of accumulating said RAID Q-data strip with at least one of said plurality of Q-data values, determining an error condition.

7

7. The method of claim 4 , further comprising: controlling a first storage device to provide a RAID P-data strip, said RAID P-data strip being sent to a P-data virtual buffer; receiving said RAID P-data strip; and, controlling a second storage device to provide a RAID Q-data strip, said RAID Q-data strip being sent to a Q-data virtual buffer; receiving said RAID Q-data strip; and, based on said result of accumulating said RAID Q-data strip with at least one of said plurality of Q-data values, and based on said result of accumulating said RAID P-data strip with at least one of said plurality of P-data values, determining an error condition.

8

8. A system for checking RAID information, comprising: a virtual buffer compare that compares an address presented on a system bus with a predefined data range, a predefined RAID P-data range and a predefined RAID Q-data range, wherein said virtual buffer compare respectively generates one of a HITD, HITP or HITQ signal in response to the address being within the predefined data range, the predefined RAID P-data range or the predefined RAID Q-data range; a selector that, in response to the receipt of the HITD or HITQ signal and based on said address presented on said system bus, selects a Galois Field constant and an accumulator buffer address; a Galois Field multiplier that performs a Galois Field multiplication on said Galois Field constant and a block of data that corresponds to said address present on said system bus; a P-data exclusive-OR accumulator that stores, in response to the receipt of the HITD or HITP signal, a P-data result of an exclusive-OR operation on said block of data and a stored P-data value corresponding to said accumulator buffer address; and, a Q-data exclusive-OR accumulator that stores, in response to the receipt of the HITD or HITQ signal, a Q-data result of an exclusive-OR operation on a Galois Field multiplication result and a stored Q-data value corresponding to said accumulator buffer address.

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Patent Metadata

Filing Date

January 9, 2009

Publication Date

November 25, 2014

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