Patentable/Patents/US-8901745
US-8901745

Three-dimensional semiconductor devices

PublishedDecember 2, 2014
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

A three-dimensional semiconductor device may include a substrate including wiring and contact regions and a thin film structure on the wiring and contact regions of the substrate. The thin-film structure may include a plurality of alternating wiring layers and inter-layer insulating layers defining a terraced structure in the contact region so that each of the wiring layers includes a contact surface in the contact region that extends beyond others of the wiring layers more distant from the substrate. A plurality of contact structures may extend in a direction perpendicular to a surface of the substrate with each of the contact structures being electrically connected to a contact surface of a respective one of the wiring layers. Related methods are also discussed.

Patent Claims
17 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A three-dimensional semiconductor device comprising; a substrate including wiring and contact regions; a thin film structure on the wiring and contact regions of the substrate, wherein the thin-film structure includes a plurality of alternating wiring layers and inter-layer insulating layers defining a terraced structure in the contact region so that each of the wiring layers includes a contact surface in the contact region that extends beyond others of the wiring layers more distant from the substrate; and a plurality of contact structures extending in a direction perpendicular to a surface of the substrate wherein each of the contact structures is electrically connected to a contact surface of a respective one of the wiring layers, wherein an interface between one of the contact structures and the respective wiring layer has a total length in a direction parallel to an adjacent edge of the respective wiring layer wherein the total length of the interface is substantially the same as a total length of the adjacent edge of the respective wiring layer.

2

2. The three-dimensional semiconductor device of claim 1 wherein adjacent ones of the wiring layers are separated by a first distance in a first direction perpendicular to the surface of the substrate, wherein adjacent ones of the contact structures are separated by a second distance in a second direction parallel to the surface of the substrate, and wherein the second distance is greater than the first distance.

3

3. The three-dimensional semiconductor device of claim 1 wherein each of the contact structures has a first width adjacent a respective one of the contact surfaces that is less than a second width spaced apart from the respective contact surface.

4

4. The three-dimensional semiconductor device of claim 1 wherein each of the contact surfaces extends beyond an interface with the respective contact structure in a direction away from the wiring region.

5

5. The three-dimensional semiconductor device of claim 1 wherein each of the alternating wiring layers defines an area that is greater than areas of wiring layers more distant from the substrate.

6

6. A three-dimensional semiconductor device comprising: a substrate including wiring and contact regions; a thin film structure on the wiring and contact regions of the substrate, wherein the thin-film structure includes a plurality of alternating wiring layers and inter-layer insulating layers defining a terraced structure in the contact region so that each of the wiring layers includes a contact surface in the contact region that extends beyond others of the wiring layers more distant from the substrate; and a plurality of contact structures extending in a direction perpendicular to a surface of the substrate wherein each of the contact structures is electrically connected to a contact surface of a respective one of the wiring layers, wherein an interface between one of the contact structures and the respective wiring layer has a length in a direction parallel to an adjacent edge of the respective wiring layer wherein the length of the interface is substantially the same as a length of the adjacent edge of the respective wiring layer, wherein the one of the contact structures is a first one of the contact structures, wherein the respective wiring layer comprises a first wiring layer, wherein the interface comprises a first interface, wherein a second interface between a second one of the contact structures and a respective second wiring layer defines an area that is substantially less than an area defined by the first interface.

7

7. The three-dimensional semiconductor device of claim 1 further comprising: semiconductor patterns through the thin film structure; and information storing layers between the semiconductor patterns and the wiring layers.

8

8. The three-dimensional semiconductor device of claim 1 wherein the one of the contact structures has a substantially hexahedron shape.

9

9. The three-dimensional semiconductor device of claim 1 further comprising: a single row of conductive patterns extending through the plurality of alternating wiring layers and inter-layer insulating layers in the wiring region, wherein a memory cell is defined at each intersection of a conductive pattern and a wiring layer so that only the single row of conductive patterns extends through the plurality of alternating wiring layers and inter-layer insulating layers.

10

10. The three-dimensional semiconductor device of claim 6 wherein the first interface is a substantially rectangular interface, and wherein the second interface is a substantially circular interface.

11

11. A three-dimensional semiconductor device comprising: a substrate including wiring and contact regions; a thin film structure on the wiring and contact regions of the substrate, wherein the thin-film structure includes a plurality of alternating wiring layers and inter-layer insulating layers defining a terraced structure in the contact region so that each of the wiring layers includes a contact surface in the contact region that extends beyond others of the wiring layers more distant from the substrate; a plurality of contact structures extending in a direction perpendicular to a surface of the substrate wherein each of the contact structures is electrically connected to a contact surface of a respective one of the wiring layers; and a single row of conductive patterns extending through the plurality of alternating wiring layers and inter-layer insulating layers in the wiring region, wherein a memory cell is defined at each intersection of a conductive pattern and a wiring layer so that only the single row of conductive patterns extends through the plurality of alternating wiring layers and inter-layer insulating layers, wherein an interface between one of the contact structures and the respective wiring layer has a length in a direction parallel to an adjacent edge of the respective wiring layer wherein the length of the interface is substantially the same as a length of the adjacent edge of the respective wiring layer, wherein the one of the contact structures is a first one of the contact structures, wherein the respective wiring layer comprises a first wiring layer, wherein the interface comprises a first interface, wherein a second interface between a second one of the contact structures and a respective second wiring layer defines an area that is substantially less than an area defined by the first interface.

12

12. The three-dimensional semiconductor device of claim 11 wherein the one of the contact structures has a substantially hexahedron shape.

13

13. The three-dimensional semiconductor device of claim 11 wherein adjacent ones of the wiring layers are separated by a first distance in a first direction perpendicular to the surface of the substrate, wherein adjacent ones of the contact structures are separated by a second distance in a second direction parallel to the surface of the substrate, and wherein the second distance is greater than the first distance.

14

14. The three-dimensional semiconductor device of claim 11 wherein each of the contact structures has a first width adjacent a respective one of the contact surfaces that is less than a second width spaced apart from the respective contact surface.

15

15. The three-dimensional semiconductor device of claim 11 wherein each of the contact surfaces extends beyond an interface with the respective contact structure in a direction away from the wiring region.

16

16. The three-dimensional semiconductor device of claim 11 wherein each of the alternating wiring layers defines an area that is greater than areas of wiring layers more distant from the substrate.

17

17. The three-dimensional semiconductor device of claim 11 wherein the first interface is a substantially rectangular interface, and wherein the second interface is a substantially circular interface.

Classification Codes (CPC)

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Patent Metadata

Filing Date

February 20, 2013

Publication Date

December 2, 2014

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