A method of forming a strained semiconductor material that in one embodiment includes forming a cleave layer in a host semiconductor substrate, and contacting a strain inducing material layer on a surface of a of the host semiconductor substrate. A handle substrate is then contacted to an exposed surface of the stress inducing material layer. The transfer portion of the host semiconductor substrate may then be separated from the host semiconductor substrate along the cleave layer. A dielectric layer is formed directly on the transfer portion of the host semiconductor substrate. The handle substrate and the stress inducing material are then removed, wherein the transferred portion of the host semiconductor substrate provides a strained semiconductor layer that is in direct contact with a dielectric layer.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method of forming a strained semiconductor material comprising: epitaxially growing a cleave layer comprising a germanium containing material on a topmost surface of a first base semiconductor layer; forming a silicon layer on a topmost surface of the cleave layer, wherein the first base semiconductor layer, the cleave layer and the silicon layer form a host semiconductor substrate; contacting a strain inducing material layer selected from a metal or polymer to the silicon layer of the host semiconductor substrate, wherein the strain inducing material layer induces a strain in the silicon layer of the host semiconductor substrate; contacting a first handle substrate to an exposed surface of the strain inducing material layer; separating an entirety of the silicon layer of the host semiconductor substrate from the host semiconductor substrate along the topmost surface of the cleave layer, wherein said separating comprises a spalling process in which the first handle substrate is pulled in a direction away from the host semiconductor substrate to expose a surface of the silicon layer previously forming an interface with said cleaving layer; bonding a second handle substrate to the surface of the silicon layer previously forming an interface with said cleaving layer, wherein the bonding of the second handle substrate to the silicon layer retains the strain in the silicon layer that was induced by the strain inducing material layer; and removing the first handle substrate and the strain inducing material layer, wherein the silicon layer of the host semiconductor substrate provides a strained semiconductor layer that is bonded to the second handle substrate at said surface that previously formed an interface with said cleaving layer.
2. The method of claim 1 , wherein the strained semiconductor layer has an intrinsic compressive strain, and the strain inducing material layer is a tensile stressor layer.
3. The method of claim 2 , wherein a p-type semiconductor device is formed on the strained semiconductor layer.
4. The method of claim 1 , wherein the forming of the silicon layer comprises an epitaxial deposition process.
5. The method of claim 1 , wherein the cleave layer and the first base semiconductor layer are separated by a silicon doped with carbon (Si:C) layer.
6. The method claim 1 further comprising exposing the host semiconductor substrate to a hydrogen (H 2 ) plasma, wherein hydrogen (H) diffuses to an interface between the cleave layer and the silicon layer.
7. The method of claim 1 , wherein the strain inducing material layer is a selected from the group consisting of silicon nitride, silicon oxynitride, nickel (Ni), titanium (Ti), chromium (Cr), iron (Fe), tungsten (W), molybdenum (Mo) and a combination thereof.
8. The method of claim 1 , wherein the strain inducing material layer is a polymer that is selected from the group consisting of polyimides, polyesters, polyolefins, polyacrylates, polyurethane, polyvinyl acetate, polyvinyl chloride and a combination thereof.
9. The method of claim 1 , wherein the contacting of the first handle substrate to the exposed surface of the strain inducing material layer comprises depositing an interface dielectric layer on the exposed surface of the strain inducing material layer, and depositing the strain inducing material layer on the interface dielectric layer.
10. The method of claim 9 , wherein the interface dielectric layer is an oxide.
11. The method of claim 1 , wherein the first handle substrate is an adhesive tape, and the contacting of the first handle substrate to the exposed surface of the strain inducing material layer comprises bonding the adhesive tape to the exposed surface of the strain inducing material layer.
12. The method of claim 11 , wherein the adhesive tape is composed of a polymer that is selected from the group consisting of acrylics, polyesters, olefins, vinyl and a combination thereof.
13. The method of claim 1 , wherein the separating of the silicon layer of the host semiconductor substrate from the host semiconductor substrate along the cleave layer comprises applying a force to the silicon layer of the host semiconductor substrate through the first handle substrate in a direction away from the cleave layer.
14. The method of claim 1 , wherein the bonding of the second handle substrate to the silicon layer of the host semiconductor layer comprises depositing a dielectric layer on the second handle substrate and bonding the second handle substrate to the silicon layer of the host semiconductor layer through the dielectric layer.
15. The method of claim 14 , wherein the dielectric layer is composed of a material selected from the group consisting of silicon oxide, silicon oxynitride, silicon nitride, metal-oxide high-k dielectrics, boron nitride and combinations thereof.
16. The method of claim 1 , wherein the bonding of the second handle substrate to the silicon layer of the host semiconductor layer comprises depositing a dielectric layer on the silicon layer of the host semiconductor layer and bonding the second handle substrate to the silicon layer of the host semiconductor layer through the dielectric layer.
17. The method of claim 1 , wherein the bonding of the second handle substrate to the silicon layer of the host semiconductor layer comprises depositing a first dielectric layer on the silicon layer of the host semiconductor layer and depositing a second dielectric layer on the second handle substrate, and bonding the first dielectric layer to the second dielectric layer.
18. The method of claim 1 , wherein the strain that is retained in the silicon layer of the host semiconductor substrate ranges from 10 MPa to 2000 MPa.
19. The method of claim 1 , wherein the removing of the first handle substrate and the strain inducing material layer comprises etching with an etch chemistry that is selective to the silicon layer of the host semiconductor substrate.
20. The method of claim 1 , wherein the strained semiconductor layer has a crystal orientation selected from the group consisting of (100), (110) and (111) with a miscut angle from 0 degrees to 10 degrees toward a crystal plane selected from the group consisting of [110] and [111].
21. The method of claim 1 , further comprising introducing boron into said cleave layer prior to forming the silicon layer.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
September 12, 2012
December 30, 2014
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