A method of forming of a semiconductor structure has isolation structures. A substrate having a first region and a second region is provided. The first region and the second region are implanted with neutral dopants to form a first etching stop feature and a second stop feature in the first region and the second region, respectively. The first etching stop feature has a depth D1 and the second etching stop feature has a depth D2. D1 is less than D2. The substrate in the first region and the second region are etched to form a first trench and a second trench respectively. The first trench and the second trench land on the first etching stop feature and the second etching stop feature, respectively.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method of forming a semiconductor structure having isolation structures, the method comprising: providing a substrate having a first region and a second region; implanting the first region and the second region with neutral dopants to form a first etching stop feature and a second stop feature in the first region and the second region, respectively, the first etching stop feature having a depth D 1 , and the second etching stop feature having a depth D 2 , wherein D 1 is less than D 2 ; etching the substrate in the first region and the second region to form a first trench and a second trench, respectively, wherein the first trench and the second trench land on the first etching stop feature and the second etching stop feature, respectively; and filling the first trench and the second trench with a dielectric material to form a first isolation structure and a second isolation structure, wherein the first isolation structure substantially has the depth D 1 and the second isolation structure substantially has the depth D 2 .
2. The method of claim 1 , wherein the neutral dopants include at least one of oxygen or nitrogen.
3. The method of claim 1 , wherein each of the first etching stop feature and the second etching stop feature have an etching selectivity relative to the substrate in a range from about 1:10 to about 1:200.
4. The method of claim 3 , wherein each of the first etching stop feature and the second etching stop feature have an etching selectivity to the substrate in a range from about 1:20 to about 1:40.
5. The method of claim 1 , wherein each of the first etching stop feature and the second etching stop feature have a thickness in a range from about 200 Å to about 2000 Å.
6. The method of claim 1 , wherein the step of implanting the first region and the second region comprising: independently implanting the first region and the second region with different steps.
7. The method of claim 1 , wherein the step of implanting the first region and the second region comprises: forming a patterned photo resist layer having a first opening and a second opening over the first region and the second region with a gray scale mask, wherein the first opening has a bottom surface of above a top surface of the substrate and the second opening exposes a portion of the top surface of the substrate; and simultaneously implanting the first region and the second region through the first opening and the second opening.
8. The method of claim 1 , further comprising: annealing the first etching stop feature and the second etching stop feature after the step of implanting the first region and the second region and before the step of etching the substrate in the first region and the second region.
9. The method of claim 1 , further comprising: forming at least one photodetector in the first region of the substrate adjacent to the first isolation structure.
10. A method of forming a semiconductor structure having isolation structures, the method comprising: providing a substrate having a front surface and a back surface, and a first region and a second region; implanting the substrate to form a first etching stop feature and a second stop feature in the first region and the second region respectively, the first etching stop feature having a depth D 1 from the front surface and the second etching stop feature having a depth D 2 from the front surface, wherein D 1 is less than D 2 ; etching the substrate in the first region and the second region to form a first trench and a second trench, respectively, wherein the first etching stop feature and the second etching stop feature have a higher etching resistance than the substrate; and filling the first trench and the second trench with a dielectric material to form a first isolation structure and a second isolation structure, wherein the first isolation structure substantially has the depth D 1 and the second isolation structure substantially has the depth D 2 .
11. The method of claim 10 , wherein first etching stop feature and second stop feature include at least one of oxygen or nitrogen.
12. The method of claim 10 , wherein each of the first etching stop feature and the second etching stop feature have an etching selectivity relative to the substrate in a range from about 1:10 to about 1:200.
13. The method of claim 10 , wherein the step of implanting the first region and the second region comprising: independently implanting the first region and the second region with different steps.
14. The method of claim 10 , wherein the step of implanting the first region and the second region comprises: forming a patterned photo resist layer having a first opening and a second opening over the front surface of the first region and the second region with a gray scale mask, wherein the first opening has a bottom surface of above the front surface of the substrate and the second opening exposes a portion of the front surface of the substrate; and simultaneously implanting the first region and the second region through the first opening and the second opening.
15. The method of claim 10 , further comprising: annealing the first etching stop feature and the second etching stop feature after the step of implanting the first region and the second region and before the step of etching the substrate in the first region and the second region.
16. The method of claim 10 , further comprising: forming at least one photodetector in the first region of the substrate adjacent to the first isolation structure; and thinning the substrate from the back surface to form a backside illuminated image (BSI) sensor device.
17. The method of claim 16 , further comprising: forming a color filter and a lens over the back surface of the substrate, wherein the color filter and the lens are aligned with the at least one photodetector.
18. A semiconductor structure having isolation structures, comprising: a substrate having a front surface and a back surface; a first isolation structure extending from the front surface into the substrate, the first isolation structure having a depth D 1 from the front surface; a second isolation structure extending from the front surface into the substrate, the second isolation structure having a depth D 2 from the front surface, wherein the depth D 1 is less than the depth D 2 ; and a first etching stop feature and a second etching stop feature embedded in the substrate and contacting the first isolation structure and the second isolation structure, respectively.
19. The semiconductor structure of claim 18 , wherein first etching stop feature and second stop feature include at least one of oxygen or nitrogen.
20. The semiconductor structure of claim 18 , wherein each of the first etching stop feature and the second etching stop feature have an etching selectivity relative to the substrate in a range from about 1:10 to about 1:200.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
November 14, 2012
March 3, 2015
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