A method is provided for controlling turn-on of phases of a multiphase regulator. According to the method, there are tested the conditions necessary for the turn-on of a phase to be turned-on indicated by a first cell of the phase register, and in response to a positive result a corresponding ramp signal is reset. There is then tested the conditions necessary for the turn-on of a phase successive to the phase to be turned on according to the list of priorities of the phase register, and corresponding ramp signals are reset if there is a positive result. In response to no positive results of testing conditions necessary for the turn-on of all phases successive to the phase to be turned on, there is reset a ramp signal corresponding to a phase successive to a last turned on phase indicated by a last cell of the phase register.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method for controlling turn-on of a plurality of phases of a multiphase regulator of the interleaving type, the phases being turned on by respective modulation signals generated from corresponding ramp signals, and being turned on according to a list of priorities stored by a plurality of cells of a phase register, the method comprising the steps of: testing conditions necessary for the turn-on of a phase to be turned on that is indicated by a first cell of the phase register; in response to a positive result of the test of the conditions necessary for the turn-on of a phase to be turned on, resetting a corresponding ramp signal; after the step of resetting the corresponding ramp signal, testing conditions necessary for the turn-on of a phase successive to the phase to be turned on according to the list of priorities of the phase register, and resetting corresponding ramp signals in response to a positive result of such testing; and in response to no positive results of testing conditions necessary for the turn-on of all phases successive to the phase to be turned on, forcing reset of a ramp signal corresponding to a phase successive to a last turned on phase that is indicated by a last cell of the phase register, and returning to the step of testing the conditions necessary for the turn-on of a phase to be turned on.
2. The method according to claim 1 , wherein the testing of the conditions necessary for the turn-on of a phase comprises determining whether or not a control voltage of that phase is greater than a minimum voltage reference value.
3. The method according to claim 1 , wherein the testing of the conditions necessary for the turn-on of a phase comprises determining whether or not a common control voltage is greater than a minimum voltage reference value relative to that phase.
4. The method according to claim 1 , wherein the testing of the conditions necessary for the turn-on of a phase comprise updating a further cell indicating a last reset of the phase register by inserting an identifying number of the turned on phase in the further cell.
5. The method according to claim 4 , further comprising: after the updating, testing the presence or not of a corresponding modulation signal.
6. The method according to claim 5 , further comprising: in response to a positive result of the testing of the presence or not of a corresponding modulation signal, updating the phase register by inserting an identifying number of the phase that has been turned on in the last cell of the phase register, and shifting values contained in the other cells in consequence.
7. The method according to claim 6 , wherein the updating of the phase register is not performed if the testing of the conditions necessary for the turn-on of a phase has given a positive result on a last turned-on phase indicated by an identifying number contained in the last cell of the phase register.
8. A modulation system comprising: an interleaving multiphase regulator having a plurality of phases; a PWM signal comparator block for the phases; a modulator configured to supply a plurality of ramp signals to the PWM signal comparator block, the modulator including control logic configured to determine a reset sequence of the ramp signals; and a current sharing control circuit configured to generate a plurality of minimum voltage references respectively based on respective currents of the respective phases, wherein: the PWM signal comparator comprises a plurality of comparators respectively corresponding to the phases, each of the comparators having: a first input terminal that is configured to receive a control voltage signal, and a second input terminal configured to receive a respective ramp signal of the plurality of ramp signals from the modulator, and the modulator includes a control terminal configured to receive the control voltage signal and a plurality of supply terminals configured to receive the plurality of minimum voltage references from the current sharing control circuit, the modulator being configured to generate the ramp signals based on the minimum voltage references.
9. A modulation system comprising: a multiphase regulator of the interleaving type having a plurality of phases; a PWM signal comparator block for the phases; and a modulator configured to supply a plurality of ramp signals to the PWM signal comparator block, the modulator including control logic for determining a reset sequence of the ramp signals, wherein the modulator further comprises a phase register, the phase register including a plurality of cells storing a list of priorities, each of the cells indicating one of the phases, a first cell indicating a phase to be turned on as determined by the control logic and a last cell indicating a last turned on phase.
10. The modulation system according to claim 9 , wherein the control logic is configured to update the cells of the phase register by indicating a phase which is turned on in the last cell and shifting values of the other cells.
11. The modulation system according to claim 8 , wherein each of the comparators has an output terminal that configured to supply a respective one of a plurality of modulation signals for respectively controlling the phases.
12. The modulation system according to claim 8 , wherein the modulator further comprises a plurality of feedback terminals connected to output terminals of the PWM signal comparator.
13. A modulation system comprising: a multiphase regulator of the interleaving type having a plurality of phases; a PWM signal comparator block for the phases; and a modulator configured to supply a plurality of ramp signals to the PWM signal comparator block, the modulator including control logic for determining a reset sequence of the ramp signals, wherein the modulator comprises: a supply terminal configured to receive a minimum voltage reference corresponding to a minimum voltage value of modulation signals for controlling the phases; and a ramp signal generator connected to a plurality of output terminals of the control logic and configure to receive the minimum voltage reference, the ramp signal generator having a plurality of output terminals configured to supply the ramp signals.
14. The modulation system according to claim 13 , wherein the modulator comprises an input comparator block that includes a plurality of comparators whose number is identical to the number of phases, each of the comparators having a first input terminal connected to a respective control terminal for receiving a control voltage signal, a second input terminal configured to receive the minimum voltage reference, and an output terminal connected to corresponding input terminals of the control logic.
15. The modulation system according to claim 13 , wherein the ramp signal generator comprises: a minimum voltage reference terminal configured to receive the minimum voltage reference; supply voltage reference terminal configured to receive a supply voltage reference a plurality of current generators; a plurality of capacitors; and a plurality of MOS transistors for the phases, respectively, each of the MOS transistors being coupled to a corresponding current generator of the plurality of generators between the supply voltage reference terminal and the minimum voltage reference terminal, and the capacitors being respectively coupled between the minimum voltage reference terminal and the output terminals of the ramp signal generator, each of the MOS transistors having a control terminal connected to a respective one of the output terminals of the control logic.
16. A modulation system comprising: a multiphase regulator of the interleaving type having a plurality of phases; a PWM signal comparator block for the phases; and a modulator configured to supply a plurality of ramp signals to the PWM signal comparator block, the modulator comprising control logic for determining a reset sequence of the ramp signals, wherein the modulator comprises: a control terminal configured to receive a common control voltage signal; a plurality of supply terminals configured to receive a plurality of minimum voltage references from a current sharing control circuit on the basis of currents of the phases; and an input comparator block that includes a plurality of comparators whose number is identical to the number of phases, each of the comparators having a first input terminal configured to receive the common control voltage signal, a second input terminal configured to receive a respective one of the minimum voltage references, and an output terminal connected to corresponding input terminals of the control logic.
17. The modulation system according to claim 16 , wherein the ramp signal generator comprises: a plurality of current generators; a plurality of MOS transistors respectively for the phases, each of the MOS transistors being coupled to a corresponding one of the current generators between a supply voltage reference terminal and a minimum voltage reference terminal; and a plurality of capacitors respectively coupled between a respective output terminal and the minimum voltage reference terminal, the MOS transistors having respective control terminals connected to the output terminals of the control logic.
18. A multiphase regulator including at least one modulation system connected to a plurality of phases, each of the phases including a pair of switches driven by a corresponding driving circuit so as to supply a suitable output voltage value to an output terminal of the multiphase regulator, the multiphase regulator comprising: a PWM signal generator connected to a modulator of the modulation system for supplying modulation signals to the phases; a current sharing control circuit configured to receive currents of the phases; and an error comparator having a first input terminal configured to receive a reference voltage value, and a second input terminal connected, through a first impedance, to the output terminal and, through a second impedance, to an output terminal of the error comparator, wherein the modulation system comprises: a multiphase regulator of the interleaving type having a plurality of phases; a PWM signal comparator block for the phases; and a modulator configured to supply a plurality of ramp signals to the PWM signal comparator block, the modulator comprising control logic for determining a reset sequence of the ramp signals, and a phase register that includes a plurality of cells storing a list of priorities, each of the cells indicating one of the phases, a first cell indicating a phase to be turned on as determined by the control logic and a last cell indicating a last turned on phase.
19. The multiphase regulator according to claim 18 , wherein the current sharing control circuit is configured to supply a plurality of balance voltages a plurality of adder nodes that are configured to add the balance voltages to a signal on the output terminal of the error comparator.
20. The multiphase regulator according to claim 18 , wherein the current sharing control circuit is configured to supply a plurality of minimum voltage references to a plurality of supply terminals of the modulator, and the output terminal of the error comparator is connected to a control terminal of the PWM signal generator.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
June 10, 2010
March 3, 2015
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