A manufacturing method of a silicon carbide semiconductor device includes: forming a drift layer on a silicon carbide substrate; forming a base layer on or in a surface portion of the drift layer; forming a source region in a surface portion of the base layer; forming a trench to penetrate the base layer and to reach the drift layer; forming a gate electrode on a gate insulation film in the trench; forming a source electrode electrically connected to the source region and the base layer; and forming a drain electrode on a back surface of the substrate. The forming of the trench includes: flattening a substrate surface; and etching to form the trench after flattening.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A manufacturing method of a silicon carbide semiconductor device having a transistor with a trench gate structure having improved sidewall flatness, the method comprising: forming a drift layer, which is made of silicon carbide and has a first conductive type with an impurity concentration lower than a substrate, on a substrate having the first conductive type or a second conductive type and made of silicon carbide; forming a base layer, which has the second conductive type and is made of silicon carbide, on or in a surface portion of the drift layer; after implanting a first conductive type impurity as an ion in a surface portion of the base layer, activating the ion-implanted first conductive type impurity and forming a source region made of silicon carbide and having the first conductive type with an impurity concentration higher than the drift layer; forming a trench having improved sidewall flatness by flattening a surface of the source region and directly etching a portion of the flattened surface of the source region, so as to penetrate the base layer and to reach the drift layer; forming a gate insulation film on an inner surface of the trench; forming a gate electrode on the gate insulation film in the trench; forming a source electrode electrically connected to the source region and the base layer; and forming a drain electrode on a back surface of the substrate.
2. The manufacturing method of the silicon carbide semiconductor device according to claim 1 , wherein: the flattening reduces a surface roughness of the surface of the source region to 1 nanometer or less.
3. The manufacturing method of the silicon carbide semiconductor device according to claim 1 , wherein: the flattening reduces a surface roughness of the surface of the source region to 0.5 nanometer or less.
4. The manufacturing method of the silicon carbide semiconductor device according to claim 1 , wherein: the flattening reduces a surface roughness of the surface of the source region to 0.3 nanometer or less.
5. The manufacturing method of the silicon carbide semiconductor device according to claim 1 , wherein: the flattening includes flattening the surface of the source region together with other surfaces of the base layer after forming the source region.
6. The manufacturing method of the silicon carbide semiconductor device according to claim 1 , wherein: an entire surface of the base region including the surface of the source region is flattened before forming the source region.
7. The manufacturing method of the silicon carbide semiconductor device according to claim 1 , wherein: the flattening is performed by a chemical mechanical polishing method or a catalyst referred etching method.
8. The manufacturing method of the silicon carbide semiconductor device according to claim 1 , wherein: in the forming of the trench, the trench penetrates the source region.
9. The manufacturing method of the silicon carbide semiconductor device according to claim 1 , wherein: in the forming of the trench, the trench has a sidewall roughness Ra of ≦10 nm.
10. A manufacturing method of a silicon carbide semiconductor device having a transistor with a trench gate structure having improved sidewall flatness, the method comprising: forming a drift layer of silicon carbide on a substrate of silicon carbide having a first conductive type or a second conductive type, the drift layer having the first conductive type with an impurity concentration lower than the substrate, forming a base layer on or in a surface portion of the drift layer, the base layer being made of silicon carbide and having the second conductive type; implanting a first conductive type impurity as an ion in a surface portion of the base layer, and thereafter activating the ion-implanted first conductive type impurity and forming a source region in the surface portion of the base layer, the source region being made of silicon carbide and having the first conductive type with an impurity concentration higher than the drift layer; forming a trench having improved sidewall flatness by: flattening a surface of the source region; and etching a portion of the flattened surface of the source region and forming a trench that penetrates the base layer and reaches the drift layer immediately after the flattening step and prior to forming another transistor functioning layer on or within the flattened surface of the source region; forming a gate insulating film on an inner surface of the trench; forming a gate electrode on the gate insulation film in the trench; forming a source electrode electrically connected to the source region and the base layer; and forming a drain electrode on a back surface of the substrate.
11. The manufacturing method of the silicon carbide semiconductor device according to claim 10 , wherein: the flattening reduces a surface roughness of the surface of the source region to 1 nanometer or less.
12. The manufacturing method of the silicon carbide semiconductor device according to claim 10 , wherein: the flattening reduces a surface roughness of the surface of the source region to 0.5 nanometer or less.
13. The manufacturing method of the silicon carbide semiconductor device according to claim 10 , wherein: the flattening reduces a surface roughness of the surface of the source region to 0.3 nanometer or less.
14. The manufacturing method of the silicon carbide semiconductor device according to claim 10 , wherein: the flattening includes flattening the surface of the source region together with other surfaces of the base layer.
15. The manufacturing method of the silicon carbide semiconductor device according to claim 10 , wherein: the flattening includes flattening an entire surface of the base region including the surface of the source region.
16. The manufacturing method of the silicon carbide semiconductor device according to claim 10 , wherein: the flattening includes a chemical mechanical polishing method or a catalyst referred etching method.
17. The manufacturing method of the silicon carbide semiconductor device according to claim 10 , including: forming the trench with a sidewall roughness Ra of less than or equal to 10 nm.
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September 4, 2012
March 10, 2015
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