The present invention aims to relax stress induced by through-silicon via formed on semiconductor substrate in order to prevent property fluctuation of a transistor. A semiconductor device includes a semiconductor substrate, a through-silicon via formed in semiconductor substrate, an insulating film formed between the semiconductor substrate and the through-silicon via, and a transistor formed on the semiconductor substrate so as to be apart from the through-silicon via with a predetermined distance. The insulating film does not exist on a region close to a surface of the semiconductor substrate between the semiconductor substrate and the through-silicon via. A gap is formed to be surrounded by the semiconductor substrate, the through silicon via, and the insulating film under the region close to the surface of the semiconductor substrate.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A semiconductor device comprising: a semiconductor substrate; a through-silicon via formed in the semiconductor substrate; an insulating film formed to be interposed between the semiconductor substrate and the through-silicon via; and a transistor formed on the semiconductor substrate so as to be apart from the through-silicon via with a predetermined distance, wherein the insulating film does not exist on a region close to a surface of the semiconductor substrate between the semiconductor substrate and the through-silicon via, a gap is formed to be directly surrounded by the semiconductor substrate, the through-silicon via, and the insulating film under the region close to the surface of the semiconductor substrate, and a portion of the semiconductor substrate and a portion of the through-silicon via are exposed in the gap.
2. The semiconductor device according to claim 1 , wherein the through-silicon via is formed to penetrate through a first interlayer insulating film formed on the semiconductor substrate, and the gap is also formed in the first interlayer insulating film.
3. The semiconductor device according to claim 1 , wherein the predetermined distance and a depth of the gap from the surface of the semiconductor substrate are substantially equal to each other.
4. The semiconductor device according to claim 1 , further comprising: a second interlayer insulating film on the through-silicon via, and the second interlayer insulating film is embedded in a part of the gap.
5. The semiconductor device according to claim 1 , wherein the insulating film is made of a silicon nitride film.
6. The semiconductor device according to claim 1 , wherein a stress liner film that applies stress to the transistor is formed on the semiconductor substrate excluding a region on the through-silicon via and a surrounding region thereof.
7. The semiconductor device according to claim 1 , wherein the through-silicon via includes an outside barrier film and an inside conductive film.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
August 6, 2013
May 5, 2015
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