According to one embodiment, a method of manufacturing a semiconductor device. The method includes introducing an inert gas and a material gas into a predetermined space, applying a voltage to generate plasma in the space after introducing the inert gas and the material gas so as to form a semiconductor layer on a substrate, introducing an oxidation-reduction gas in the predetermined space after the voltage is applied, and stopping the introduction of the material gas, the inert gas, and the oxidation-reduction gas after the voltage is applied.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method of manufacturing a semiconductor device, comprising: introducing an inert gas and a material gas into a predetermined space; applying a voltage to generate plasma in the space after introducing the inert gas and the material gas to form a semiconductor layer on a substrate; introducing an oxidation-reduction gas in the predetermined space after the voltage is applied, the oxidation-reduction gas reacts with the plasma and forms fine particles; and stopping the introduction of the material gas, the inert gas, and the oxidation-reduction gas after the voltage is applied.
2. The method according to claim 1 , wherein the oxidation-reduction gas is introduced simultaneously with or after introducing the material gas is stopped.
3. The method according to claim 1 , wherein the introduction of the oxidation-reduction gas is carried out before the stoppage of the material gas introduction to form an oxide film or a nitride film on the semiconductor layer, and the method further comprises wet-processing of removing the oxide film or the nitride film that is formed on the semiconductor layer.
4. The method according to claim 1 , wherein the fine particles are charged.
5. The method according to claim 1 , wherein performing vacuum and evacuate the fine particles from the predetermined space.
6. The method according to claim 1 , wherein the fine particles contains at least one of SiO, SiO 2 , SiNH or SiNH 2 .
7. The method according to claim 1 , wherein the oxidation-reduction gas contains at least one of N2, O2, CO, CO2, NO, NO2, and NH3.
8. The method according to claim 1 , wherein the material gas contains SiH 4 .
9. The method according to claim 1 , wherein the thickness of the oxide film is 10 nm 100 nm.
10. The method according to claim 1 , wherein a thickness of the semiconductor layer is about 100 nm.
11. The method according to claim 1 , wherein the semiconductor layer contains amorphous silicon.
12. The method according to claim 1 , wherein the inert gas contains at least one of He, Ar, Ne and Xe.
13. A method of manufacturing a semiconductor device, comprising: introducing an inert gas and a material gas into a predetermined space; applying a voltage to generate plasma in the space after introducing the inert gas and the material gas to form a semiconductor layer on a substrate; introducing an oxidation-reduction gas in the predetermined space after the voltage is applied, the introduction of the oxidation-reduction gas being carried out before a stoppage of the material gas introduction to form an oxide film or a nitride film on the semiconductor layer; stopping the introduction of the material gas, the inert gas, and the oxidation-reduction gas after the voltage is applied; and wet-processing of removing the oxide film or the nitride film that is formed on the semiconductor layer.
14. The method according to claim 13 , wherein the nitride film contains SiN.
15. The method according to claim 13 , wherein wet-processing of removing the oxide film or the nitride film is performed by using liquid which contain phosphoric acid.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
March 3, 2014
July 28, 2015
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