A semiconductor composite apparatus includes a semiconductor thin film layer and a substrate. The semiconductor thin film layer and the substrate are bonded to each other with a layer of an alloy of a high-melting-point metal and a low-melting-point metal formed between the semiconductor thin film layer and the substrate. The alloy has a higher melting point than the low-melting-point metal. The layer of the alloy contains a product resulting from a reaction of the low-melting-point metal and a material of said semiconductor thin film layer.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method of manufacturing a semiconductor composite apparatus, comprising the steps of: preparing a semiconductor thin film; preparing a laminated substrate that includes a high-melting-point metal layer on a surface of a base substrate and a low-melting-point metal layer formed in contact with the high-melting-point metal layer; placing the semiconductor thin film directly on the low-melting-point metal layer; and heating the low-melting-point metal layer to melt at a temperature higher than a melting point of the low-melting-point metal layer but lower than a melting point of the high-melting-point metal layer.
2. The method according to claim 1 , wherein said low-melting-point metal layer is selected from the group consisting of In, Sn, Bi, Ce, and Tl.
3. The method according to claim 1 , wherein said high-melting-point metal layer is formed of one selected from the group consisting of Au, Pd, and Ni.
4. The method according to claim 1 , wherein said semiconductor thin film includes light emitting elements formed therein.
5. The method according to claim 1 , wherein the low-melting-point metal layer provides adhesion to the semiconductor thin film to minimize a contact resistance between the low-melting-point metal layer and the semiconductor thin film.
6. The method according to claim 1 , wherein the low-melting-point metal layer melts to react with the high-melting-point metal, producing an alloy layer of the low-melting-point metal and the high-melting-point metal.
7. The method according to claim 6 , wherein the high-melting-point metal layer is sandwiched between said alloy layer and said base substrate; and wherein a portion of said high-melting-point metal layer, which forms said high-melting-point metal layer remains unreacted with the low-melting-point metal.
8. The method according to claim 7 , wherein the alloy layer has a higher melting point than the low-melting-point metal layer.
9. The method according to claim 7 , wherein the alloy layer contains one selected from the group consisting of Au x In y , Pd x In y , and Ni x In y .
10. The method according to claim 1 , wherein the semiconductor thin film further includes: an AlGaAs layer including a first side facing the low-melting-point metal layer and a second side opposite to the first side; and a GaAs layer on the first side of the AlGaAs layer.
11. The method according to claim 1 , wherein the semiconductor thin film further includes: an AlGaAs layer including a first side facing the low-melting-point metal layer and a second side opposite to the first side; and a GaAs layer on the second side of the AlGaAs layer.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
December 7, 2010
July 28, 2015
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