In some embodiments, a serial bus interface circuit includes at least two serial ports, a memory to store a relationship between serial bus addresses and the at least two serial ports, and a controller to control access to the at least two serial ports. The controller may be configured to receive an access request for a serial bus address, determine a first port of the at least two serial ports corresponding to the serial bus address using the relationships stored in the memory, and disable a second port of the at least two serial ports. Other embodiments are disclosed and claimed.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A serial bus interface circuit, comprising: at least two serial ports; a memory to store a relationship between serial bus addresses and the at least two serial ports; and a controller to control access to the at least two serial ports, wherein the controller is configured to: receive an access request for a serial bus address; determine a first port of the at least two serial ports corresponding to the serial bus address using the relationships stored in the memory; and disable a second serial port of the at least two serial ports to prevent transmission to the second serial port.
2. The serial bus interface circuit of claim 1 , wherein each serial port of the at least two serial ports not corresponding to the serial bus address are to be disabled.
3. The serial bus interface circuit of claim 1 , wherein data is to be transmitted to the first serial port and not the second serial port.
4. The serial bus interface circuit of claim 1 , wherein a port enable signal is to be output to the first serial port.
5. The serial bus interface circuit of claim 1 , wherein the controller is to use the serial bus address from a packet to determine the first port and to disable the second port.
6. The serial bus interface of claim 1 , wherein the controller is to use the serial bus address from a transfer descriptor to determine the first port and to disable the second port.
7. The serial bus interface circuit of claim 3 , wherein the second serial port is to be shut off before the data is to be transmitted.
8. A method of operating a serial bus interface, comprising: providing at least two serial ports; storing a relationship between serial bus addresses and the at least two serial ports; receiving an access request for a serial bus address; determining a first port of the at least two serial ports corresponding to the serial bus address based on the stored relationships; and disabling a second serial port of the at least two serial ports to prevent transmission to the second serial port.
9. The method of claim 8 , further including disabling each serial port of the at least two serial ports not corresponding to the serial bus address.
10. The method of claim 8 , further including transmitting data to the first serial port and not the second serial port.
11. The method of claim 10 , further including shutting off the second serial port before the data is transmitted.
12. The method of claim 8 , further including outputting a port enable signal is to the first serial port.
13. An electronic system, comprising: a processor; memory coupled to the processor; and a universal serial bus (USB) interface circuit including: at least two USB ports; a local memory to store a relationship between serial bus addresses and the at least two USB ports; and a controller to control access to the at least two USB ports, wherein the controller is configured to: receive an access request for a serial bus address; determine a first USB port of the at least two USB ports corresponding to the serial bus address using the relationships stored in the local memory; and disable a second USB port of the at least two USB ports to prevent transmission to the second USB port.
14. The electronic system of claim 13 , wherein each USB port of the at least two USB ports not corresponding to the serial bus address are to be disabled.
15. The electronic system of claim 13 , wherein data is to be transmitted to the first USB port and not the second USB port.
16. The electronic system of claim 13 , wherein a port enable signal is to be output to the first USB port.
17. The electronic system of claim 15 , wherein the second USB port is to be shut off before the data is to be transmitted.
18. The serial bus interface of claim 5 , wherein the packet is to be received from a port upstream to the at least two serial ports.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
December 19, 2013
August 4, 2015
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