Multiplier-divider circuit and AC-to-DC power converting apparatus incorporating the same

1. An AC-to-DC power converting apparatus adapted to convert an AC input voltage to a DC output voltage, said AC-to-DC power converting apparatus comprising: a rectifying circuit adapted for receiving the AC input voltage, and rectifying the AC input voltage to generate a rectified voltage; a power factor correction circuit coupled to said rectifying circuit for receiving the rectified voltage therefrom, and generating the DC output voltage based on the rectified voltage and a PWM signal; a first voltage detection circuit coupled to said rectifying circuit for receiving the rectified voltage therefrom, and generating a first detection voltage based on the rectified voltage; a second voltage detection circuit coupled to said power factor correction circuit for receiving the DC output voltage therefrom, and generating a second detection voltage based on the DC output voltage and a predetermined reference voltage; a multiplier-divider circuit including a ramp generating unit coupled to said first voltage detection circuit for receiving the first detection voltage therefrom, and generating a ramp signal based on the first detection voltage and a clock signal, the ramp signal having a frequency that is positively proportional to that of the clock signal, and an amplitude that is positively proportional to a magnitude of the first detection voltage, a control unit coupled to said ramp generating unit and said second voltage detection circuit, and receiving the ramp signal and the second detection voltage respectively from said ramp generating unit and said second voltage detection circuit, said control unit being operable to generate a control signal based on the ramp signal, the second detection voltage and the clock signal, the control signal having a frequency that is positively proportional to that of the clock signal, and a non-duty cycle that is negatively proportional to the amplitude of the ramp signal and that is positively proportional to a magnitude of the second detection voltage and, and an output unit coupled to said control unit for receiving the control signal therefrom, and generating an adjustment signal based on the control signal and on an input signal associated with the rectified voltage, the adjustment signal having a magnitude that is positively proportional to a magnitude of the input signal and to the magnitude of the second detection voltage and that is negatively proportional to the magnitude of the first detection voltage; and a pulse width modulation (PWM) circuit coupled to said output unit of said multiplier-divider circuit and said power factor correction circuit, receiving the adjustment signal from said output unit of said multiplier-divider circuit, and generating the PWM signal based on the adjustment signal and a predetermined ramp signal.

2. The AC-to-DC power converting apparatus as claimed in claim 1 , wherein said ramp generating unit of said multiplier-divider circuit includes: a current source circuit for generating, based on the first detection voltage from said first voltage detection circuit, a current that is positively proportional to the first detection voltage; a switch coupled to said current source circuit and operable to be conducting or non-conducting in response to the clock signal; and a capacitor coupled to said current source circuit and said switch, and capable of being charged or discharging with the current generated by said current source circuit in response to operation of said switch, thereby generating the ramp signal, which is a voltage across said capacitor.

3. The AC-to-DC power converting apparatus as claimed in claim 1 , wherein said ramp generating unit of said multiplier-divider circuit includes: a first transistor having a first end, a second end, and a control end for receiving a control voltage such that said first transistor conducts or does not conduct in response to the control voltage; a resistor coupled between said second end of said first transistor and ground; an operational amplifier having a non-inverting input end that is coupled to said first voltage detection circuit for receiving the first detection voltage therefrom, an inverting input end that is coupled to said second end of said first transistor for receiving a voltage across said resistor, and an output end that is coupled to said control end of said first transistor, said operational amplifier outputting the control signal at said output end thereof based on the first detection voltage and the voltage across said resistor; a current mirror having an input end that is coupled to said first end of said first transistor, and an output end, said current mirror including two second transistors each of which has a first end, a second end and a control end, said first ends of said second transistors being coupled to each other, said second ends of said second transistors serving respectively as said input and output ends of said current mirror, said control ends of said second transistors being coupled to said input end of said current mirror; a capacitor coupled between said output end of said current mirror and ground, a voltage across said capacitor serving as the ramp signal; and a switch coupled in parallel to said capacitor, and operable to be conducting or non-conducting in response to the clock signal; when said first transistor conducts in response to the control voltage, said current mirror permitting a reference current to flow out of said input end thereof, and generating a mirroring current that corresponds to the reference current and that flows out of said output end thereof; said capacitor being charged by the mirroring current to raise the ramp signal when said switch is non-conducting in response to the clock signal being at a low level, said capacitor discharging to lower the ramp signal when said switch is conducting in response to the clock signal being at a high level.

4. The AC-to-DC power converting apparatus as claimed in claim 1 , wherein said control unit of said multiplier-divider circuit includes: a comparator having a first input end that is coupled to said ramp generating unit for receiving the ramp signal therefrom, a second input end that is coupled to said second voltage detection circuit for receiving the second detection voltage therefrom, and an output end, said comparator outputting a comparison signal at said output end thereof based on the ramp signal and the second detection voltage; and a logic gate having a first end that is coupled to said output end of said comparator for receiving the comparison signal therefrom, a second end for receiving the clock signal, and an output end, said logic gate outputting the control signal at said output end thereof based on the comparison signal and the clock signal.

5. The AC-to-DC power converting apparatus as claimed in claim 4 , wherein said first and second input ends of said comparator of said control unit of said multiplier-divider circuit are a non-inverting input end and an inverting input, respectively, and said logic gate is an OR gate.

6. The AC-to-DC power converting apparatus as claimed in claim 1 , further comprising a voltage-to-current converter coupled between said rectifying circuit and said output unit of said multiplier-divider circuit, receiving the rectified voltage from said rectifying circuit, and converting the rectified voltage to a current signal that serves as the input signal.

7. The AC-to-DC power converting apparatus as claimed in claim 6 , wherein said voltage-to-current converter includes a resistor through which the rectified voltage is transferred into the current signal.

8. The AC-to-DC power converting apparatus as claimed in claim 6 , wherein said output unit of said multiplier-divider circuit includes: a transistor having a first end for receiving the current signal from said voltage-to-current converter, a second end, and a control end coupled to said control unit for receiving the control signal therefrom such that said transistor conducts or does not conduct in response to the control signal; and at least one current mirror for reproducing a current that flows out of said second end of said transistor and that serves as the adjustment signal.

9. The AC-to-DC power converting apparatus as claimed in claim 6 , wherein said output unit of said multiplier-divider circuit includes: a first transistor having a first end, a second end, and a control end coupled to said control unit for receiving the control signal therefrom such that said first transistor conducts or does not conduct in response to the control signal; a first current mirror having a first input end that is coupled to said voltage-to-current converter for receiving the current signal therefrom, and a first output end that is coupled to said second end of said first transistor, said first current mirror including two second transistors each of which has a first end, a grounded second end and a control end, said first ends of said second transistors serving respectively as said first input end and said first output end of said first current mirror, said control ends of said second transistors being coupled to said first input end of said first current mirror, said first current mirror generating a first mirroring current that corresponds to the current signal and that flows into said first output end of said first current mirror; and a second current mirror having a second input end that is coupled to said first end of said first transistor, and a second output end, said second current mirror including two third transistors each of which has a first end, a second end and a control end, said first ends of said third transistors being coupled to each other, said second ends of said third transistors serving respectively as said second input end and said second output end of said second current mirror, said control ends of said third transistors being coupled to said second input end of said second current mirror, said second current mirror permitting the first mirroring current to flow out of said second input end thereof when said first transistor conducts in response to the control signal, and generating a second mirroring current that corresponds to the first mirroring current and that flows out of said second output end of said second current mirror, the second mirroring current serving as the adjustment signal.

10. The AC-to-DC power converting apparatus as claimed in claim 1 , wherein said output unit of said multiplier-divider circuit is coupled to said rectifying circuit for receiving the rectified voltage therefrom such that the rectified voltage serves as the input signal, and includes: a duty cycle multiplier coupled to said rectifying circuit for receiving the rectified voltage therefrom, and generating a voltage output based on the rectified voltage; and a voltage-to-current converter coupled to said duty cycle multiplier for receiving the voltage output therefrom, and converting the voltage output to a current output.

11. The AC-to-DC power converting apparatus as claimed in claim 10 , wherein said duty cycle multiplier of said output unit of said multiplier-divider circuit includes: a voltage divider having an input end coupled to said rectifying circuit for receiving the rectified voltage therefrom, and an output end, and outputting, based on the rectified voltage, a divided voltage at said output end; and first and second switches coupled in series between said output end of said voltage divider and ground, said first switch being coupled to said output end of said voltage divider and being operable to be conducting or non-conducting in response to a switching control signal complementary to the control signal from said control unit, said second switch being coupled to ground and being operable to be conducting or non-conducting in response to the control signal, a potential at a common node between said first and second switches serving as said voltage output.

12. The AC-to-DC power converting apparatus as claimed in claim 11 , wherein said duty cycle multiplier of said output unit of said multiplier-divider circuit further includes a capacitor coupled in parallel to said second switch such that the potential at said common node between said first and second switches is identical to a voltage across said capacitor.

13. The AC-to-DC power converting apparatus as claimed in claim 10 , wherein said voltage-to-current converter of said output unit of said multiplier-divider circuit includes: a first transistor having a first end, a second end, and a control end for receiving a control voltage such that said first transistor is operable to be conducting or non-conducting in response to the control voltage; a resistor coupled between said second end of said first transistor and ground; an operational amplifier having a non-inverting input end coupled to said duty cycle multiplier for receiving the voltage output therefrom, an inverting input end coupled to said second end of said first transistor for receiving a voltage across said resistor, and an output end coupled to said control end of said first transistor, said operational amplifier being operable to output at said output end thereof the control voltage based on the voltage output and the voltage across said resistor; and a current mirror having an input end coupled to said first end of said first transistor, an output end coupled to said PWM circuit, said current mirror including two second transistors each of which has a first end, a second end and a control end, said first ends of said second transistors being coupled to each other, said second ends of said second transistors serving respectively as said input and output ends of said current mirror, said control ends of said second transistors being coupled to said input end of said current mirror; when said first transistor conducts in response to the control voltage, said current mirror permitting a reference current to flow out of said input end thereof, and generating a mirroring current that corresponds to the reference current and that flows out of said output end thereof, the mirroring current being identical to the current output and serving as the adjustment signal.

14. The AC-to-DC power converting apparatus as claimed in claim 10 , wherein said output unit of said multiplier-divider circuit further includes a current-to-voltage converter coupled to said voltage-to-current converter for receiving the current output therefrom, and converting the current output to a voltage that serves as the adjustment signal.

15. A multiplier-divider circuit for an AC-to-DC converting apparatus, the AC-to-DC converting apparatus including a rectifying circuit for rectifying an AC input voltage to generate a rectified voltage, and an automatic gain control circuit for generating a DC output voltage based on the rectified voltage, a predetermined ramp signal, and an adjustment signal that is generated by said multiplier-divider circuit, said multiplier-divider circuit comprising: a ramp generating unit adapted to receive a first detection voltage associated with the rectified voltage, and generating a ramp signal based on the first detection voltage and a clock signal, the ramp signal having a frequency that is positively proportional to that of the clock signal, and an amplitude that is positively proportional to a magnitude of the first detection voltage, a control unit adapted to receive a second detection voltage associated with the DC output voltage, and coupled to said ramp generating unit for receiving the ramp signal therefrom, said control unit being operable to generate a control signal based on the ramp signal, the second detection voltage and the clock signal, the control signal having a frequency that is positively proportional to that of the clock signal, and a non-duty cycle that is negatively proportional to the amplitude of the ramp signal and that is positively proportional to a magnitude of the second detection voltage, and an output unit coupled to said control unit for receiving the control signal therefrom, and generating an adjustment signal based on the control signal and on an input signal associated with the rectified voltage, the adjustment signal having a magnitude that is positively proportional to a magnitude of the input signal and to the magnitude of the second detection voltage and that is negatively proportional to the magnitude of the first detection voltage.

16. The multiplier-divider circuit as claimed in claim 15 , wherein said ramp generating unit includes: a current source circuit for generating, based on the first detection voltage from said first voltage detection circuit, a current that is positively proportional to the first detection voltage; a switch coupled to said current source circuit, and operable to be conducting or non-conducting in response to the clock signal; and a capacitor coupled to said current source circuit and said switch, and capable of being charged or discharging with the current generated by said current source circuit in response to operation of said switch, thereby generating the ramp signal, which is a voltage across said capacitor.

17. The multiplier-divider circuit as claimed in claim 15 , wherein said ramp generating unit includes: a first transistor having a first end, a second end, and a control end for receiving a control voltage such that said first transistor conducts or does not conduct in response to the control voltage; a resistor coupled between said second end of said first transistor and ground; an operational amplifier having a non-inverting input end that is coupled to said first voltage detection circuit for receiving the first detection voltage therefrom, an inverting input end that is coupled to said second end of said first transistor for receiving a voltage across said resistor, and an output end that is coupled to said control end of said first transistor, said operational amplifier outputting the control voltage at said output end thereof based on the first detection voltage and the voltage across said resistor; a current mirror having an input end that is coupled to said first end of said first transistor, and an output end, said current mirror including two second transistors each of which has a first end, a second end and a control end, said first ends of said second transistors being coupled to each other, said second ends of said second transistors serving respectively as said input and output ends of said current mirror, said control ends of said second transistors being coupled to said input end of said current mirror; a capacitor coupled between said output end of said current mirror and ground, a voltage across said capacitor serving as the ramp signal; and a switch coupled in parallel to said capacitor, and operable to be conducting or non-conducting in response to the clock signal; when said first transistor conducts in response to the control voltage, said current mirror permitting a reference current to flow out of said input end thereof, and generating a mirroring current that corresponds to the reference current and that flows out of said output end thereof; said capacitor being charged by the mirroring current to raise the ramp signal when said switch is non-conducting in response to the clock signal being at a low level, said capacitor discharging to lower the ramp signal when said switch is conducting in response to the clock signal being at a high level.

18. The multiplier-divider circuit as claimed in claim 15 , wherein said control unit includes: a comparator having a first input end that is coupled to said ramp generating unit for receiving the ramp signal therefrom, a second input end adapted for receiving the second detection voltage, and an output end, said comparator outputting a comparison signal at said output end thereof based on the ramp signal and the second detection voltage; and a logic gate having a first end that is coupled to said output end of said comparator for receiving the comparison signal therefrom, a second end for receiving the clock signal, and an output end, said logic gate outputting the control signal at said output end thereof based on the comparison signal and the clock signal.

19. The multiplier-divider circuit as claimed in claim 18 , wherein said first and second input ends of said comparator of said control unit are a non-inverting input end and an inverting input, respectively, and said logic gate is an OR gate.

20. The said multiplier-divider circuit as claimed in claim 15 , the input signal being a current signal, wherein said output unit includes: a transistor having a first end adapted for receiving the current signal, a second end, and a control end coupled to said control unit for receiving the control signal therefrom such that said transistor conducts or does not conduct in response to the control signal; and at least one current mirror for reproducing a current that flows out of said second end of said transistor and that serves as the adjustment signal.

21. The multiplier-divider circuit as claimed in claim 15 , the input signal being a current signal, wherein said output unit includes: a first transistor having a first end, a second end, and a control end coupled to said control unit for receiving the control signal therefrom such that said first transistor conducts or does not conduct in response to the control signal; a first current mirror having a first input end that is coupled to said voltage-to-current converter for receiving the current signal therefrom, and a first output end that is coupled to said second end of said first transistor, said first current mirror including two second transistors each of which has a first end, a grounded second end and a control end, said first ends of said second transistors serving respectively as said first input end and said first output end of said first current mirror, said control ends of said second transistors being coupled to said first input end of said first current mirror, said first current mirror generating a first mirroring current that corresponds to the current signal and that flows into said first output end of said first current mirror; and a second current mirror having a second input end that is coupled to said first end of said first transistor, and a second output end, said second current mirror including two third transistors each of which has a first end, a second end and a control end, said first ends of said third transistors being coupled to each other, said second ends of said third transistors serving respectively as said second input end and said second output end of said second current mirror, said control ends of said third transistors being coupled to said second input end of said second current mirror, said second current mirror permitting the first mirroring current to flow out of said second input end thereof when said first transistor conducts in response to the control signal, and generating a second mirroring current that corresponds to the first mirroring current and that flows out of said second output end of said second current mirror, the second mirroring current serving as the adjustment signal.

22. The multiplier-divider circuit as claimed in claim 15 , the rectified voltage serving as the input signal, wherein said output unit includes: a duty cycle multiplier adapted for receiving the rectified voltage, and generating a voltage output based on the rectified voltage; and a voltage-to-current converter coupled to said duty cycle multiplier for receiving the voltage output therefrom, and converting the voltage output to a current output.

23. The multiplier-divider circuit as claimed in claim 22 , wherein said duty cycle multiplier of said output unit includes: a voltage divider having an input end coupled to said rectifying circuit for receiving the rectified voltage therefrom, and an output end, and outputting, based on the rectified voltage, a divided voltage at said output end; and first and second switches coupled in series between said output end of said voltage divider and ground, said first switch being coupled to said output end of said voltage divider and being operable to be conducting or non-conducting in response to a switching control signal that is complementary to the control signal from said control unit, said second switch being coupled to ground and being operable to be conducting or non-conducting in response to the control signal, a potential at a common node between said first and second switches serving as said voltage output.

24. The multiplier-divider circuit as claimed in claim 23 , wherein said duty cycle multiplier of said output unit further includes a capacitor coupled in parallel to said second switch such that the potential at said common node between said first and second switches is identical to a voltage across said capacitor.

25. The multiplier-divider circuit as claimed in claim 22 , wherein said voltage-to-current converter of said output unit includes: a first transistor having a first end, a second end, and a control end for receiving a control voltage such that said first transistor is operable to be conducting or non-conducting in response to the control voltage; a resistor coupled between said second end of said first transistor and ground; an operational amplifier having a non-inverting input end coupled to said duty cycle multiplier for receiving the voltage output therefrom, an inverting input end coupled to said second end of said first transistor for receiving a voltage across said resistor, and an output end coupled to said control end of said first transistor, said operational amplifier being operable to output at said output end thereof the control voltage based on the voltage output and the voltage across said resistor; and a current mirror having an input end coupled to said first end of said first transistor, an output end, said current mirror including two second transistors each of which has a first end, a second end and a control end, said first ends of said second transistors being coupled to each other, said second ends of said second transistors serving respectively as said input and output ends of said current mirror, said control ends of said second transistors being coupled to said input end of said current mirror; when said first transistor conducts in response to the control voltage, said current mirror permitting a reference current to flow out of said input end thereof, and generating a mirroring current that corresponds to the reference current and that flows out of said output end thereof, the mirroring current being identical to the current output and serving as the adjustment signal.

26. The multiplier-divider circuit as claimed in claim 22 , wherein said output unit further includes a current-to-voltage converter coupled to said voltage-to-current converter for receiving the current output therefrom, and converting the current output to a voltage that serves as the adjustment signal.