A thin film transistor, an array substrate including the thin film transistor and a display device. The thin film transistor includes: a gate electrode (100), a gate insulating layer (200), an active layer (300) and a source/drain layer (400) that are successively stacked. The source/drain layer (400) comprises a source electrode (401) and a drain electrode (402) with a gap therebetween, and the active layer (300) forms a channel (301) in a region corresponding to the gap. The gate electrode (100) has a gate electrode protrusion (101) on at least one side of the channel (301) in its width direction; and the gate insulating layer (200) covers the gate electrode (100) and the gate electrode protrusion (101).
Legal claims defining the scope of protection, as filed with the USPTO.
Claim text for this patent isn't available yet.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
February 27, 2013
September 1, 2015
Browse 5M+ US patents with plain-English claim translations and AI-generated analysis.