The invention provides a lateral double-diffused metal oxide semiconductor (LDMOS). The pre-metal dielectric layer (PMD) of the LDMOS is a silicon rich content material. Additionally, the inter-layer dielectric layer (ILD), inter-metal dielectric layer (IMD), or protective layer of the LDMOS may be formed of a silicon rich content material.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A lateral double-diffused metal oxide semiconductor (LDMOS), comprising: a semiconductor substrate; a p-epitaxial layer formed on the semiconductor substrate; a p-well formed on the p-epitaxial layer; a plurality of isolation structures formed on the p-well; an n-doped buried layer formed in the p-epitaxial layer; a first high voltage n-well, a second high voltage n-well and a high voltage p-well formed on the n-doped buried layer, wherein the high voltage p-well is between the first high n-well and the second high voltage n-well; a pair of source regions formed on the first high voltage n-well; a drain region formed on the high voltage p-well; a gate dielectric layer formed on the first high voltage n-well and the high voltage p-well; a gate electrode formed on the gate dielectric layer; a pre-metal dielectric layer conformally formed on the source regions, the gate electrode, the isolation structures and the drain region, wherein the pre-metal dielectric layer is a silicon rich content material with silicon content higher than that according to silicon content of the stoichiometric composition formula, wherein the silicon rich content material comprises silicon oxide, silicon oxynitride, silicon nitride or combinations thereof, and an atomic ratio of silicon to oxygen of the silicon oxide is about (1.1-1.5): 2; an inter-layer dielectric layer formed on the pre-metal dielectric layer; and a plurality of metal plugs extending through the inter-layer dielectric layer.
2. The lateral double-diffused metal oxide semiconductor as claimed in claim 1 , wherein the silicon oxide has a refractive index between the range of about 1.5 to about 1.7.
3. The lateral double-diffused metal oxide semiconductor as claimed in claim 1 , wherein an atomic ratio of silicon to nitrogen of the silicon nitride is about (3.1-3.5):4.
4. The lateral double-diffused metal oxide semiconductor as claimed in claim 1 , wherein the silicon rich content material further comprises a dopant.
5. The lateral double-diffused metal oxide semiconductor as claimed in claim 4 , wherein the dopant comprises boron, phosphorus, germanium and combinations thereof.
6. The lateral double-diffused metal oxide semiconductor as claimed in claim 1 , wherein the silicon rich content material is formed by atmospheric pressure chemical vapor deposition or plasma enhanced chemical vapor deposition.
7. The lateral double-diffused metal oxide semiconductor as claimed in claim 1 , wherein the inter-layer dielectric layer is a silicon rich content material.
8. The lateral double-diffused metal oxide semiconductor as claimed in claim 7 , further comprising: a plurality of inter-layer dielectric layers formed on the inter-layer dielectric layer, wherein the inter-layer dielectric layers are a silicon rich content material.
9. The lateral double-diffused metal oxide semiconductor as claimed in claim 8 , further comprising: a protective layer formed on the inter-layer dielectric layers, wherein the protective layer is a silicon rich content material.
10. The lateral double-diffused metal oxide semiconductor as claimed in claim 1 , wherein the source regions, the gate electrode, the isolation structures and the drain region are between the pre-metal dielectric layer and the semiconductor substrate.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
October 30, 2009
September 22, 2015
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