Disclosed herein is a camera system including, a camera apparatus having, an image sensor, a correction section, a first transmission processing section, and a synchronization processing section, and a video processing apparatus having a second transmission processing section and a conversion section, wherein the video processing apparatus outputs the video data obtained by the conversion by the conversion section.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A camera system comprising: a camera apparatus having an image sensor configured to include pixels arranged in a predetermined array and output raw color pixel data having a pixel sequence corresponding to the array of said pixels, a first transmission processing section configured to add synchronous data to the raw color pixel data to output resultant data to outside, and a synchronization processing section configured to control a timing of imaging by said image sensor on the basis of synchronous timing setting data received by said first transmission processing section; and a video processing apparatus having a second transmission processing section configured to receive the resultant data outputted from said first transmission processing section and output synchronous timing setting data to be transmitted to said first transmission processing section, and a conversion section configured to execute pixel interpolation of the raw color pixel data received by said second transmission processing section to convert the interpolated raw color pixel data into video data having a pixel array specified by a video format, wherein said video processing apparatus outputs the video data obtained by the conversion by said conversion section.
2. The camera system according to claim 1 , wherein said video processing apparatus has a down-conversion section configured to execute down-conversion processing to reduce the number of pixels of the raw color pixel data obtained by the conversion by said conversion section, and the raw color pixel data down-converted by said down-conversion section provides video data synchronized with synchronization timing setting data outputted from said second transmission processing section.
3. The camera system according to claim 2 , wherein the raw color pixel data down-converted by said down-conversion section of said video processing apparatus is transmitted from said second transmission processing section to said first transmission processing section and said camera apparatus displays the down-converted raw color pixel data received by said first transmission processing section.
4. The camera system according to claim 1 , wherein timing of the camera apparatus is synchronized with the synchronous timing setting data.
5. The camera system according to claim 1 , wherein the video processing apparatus is connected to the camera apparatus through fiber cable.
6. The camera system according to claim 1 , wherein the raw color pixel data has 4K horizontal resolution.
7. The camera system according to claim 1 , further comprising: a first recording unit configured to record the raw color pixel data; and a second recording unit configured to record the video data.
8. A method of imaging, comprising: generating an image in a camera unit having an image sensor having pixels arranged in a predetermined array and outputting raw color pixel data having a pixel sequence corresponding to the array of said pixels, adding synchronous data to the raw color pixel data to provide resultant data and outputting the resultant data to outside, controlling a timing of imaging by said image sensor on the basis of synchronous timing setting data received from a video processing unit, receiving, at the video processing unit, the resultant data and outputting the synchronous timing setting data, executing pixel interpolation of the raw color pixel data included in the received resultant data to convert the interpolated raw color pixel data into video data having a pixel array specified by a video format, and outputting the video data obtained by the conversion of the interpolated raw color pixel data.
9. The method of claim 8 , further comprising down-conversion processing of the raw color pixel data to reduce the number of pixels of the raw color pixel data in the converted video data, wherein the converted video data is synchronized with the outputted synchronization timing setting data.
10. The method of claim 8 , further comprising synchronizing timing of the camera unit with the synchronous timing setting data.
11. The method of claim 8 , wherein the raw color pixel data has 4K horizontal resolution.
12. The method of claim 8 , further comprising recording in a first recording unit the raw color pixel data; and recording in a second recording unit the video data.
13. Circuitry for imaging and processing an image, comprising: a camera unit having an image sensor configured to include pixels arranged in a predetermined array and to output raw color pixel data having a pixel sequence corresponding to the pixel array, first transmission processing circuitry configured to add synchronous data to the raw color pixel data and to output resultant data to outside, and synchronization circuitry configured to control a timing of imaging by said image sensor on the basis of synchronous timing setting data received by said first transmission processing circuitry; and video processing circuitry having second transmission processing circuitry configured to receive the resultant data outputted from said first transmission processing circuitry and to output synchronous timing setting data for transmission to said first transmission processing circuitry, and conversion circuitry configured to execute pixel interpolation of the raw color pixel data received by said second transmission processing circuitry to convert the interpolated raw color pixel data into video data having a pixel array specified by a video format, wherein said video processing circuitry outputs the video data obtained by the conversion by said conversion circuitry.
14. The circuitry of claim 13 , wherein said video processing circuitry has down-conversion circuitry configured to execute down-conversion processing to reduce the number of pixels of the raw color pixel data obtained by the conversion by said conversion circuitry, and the raw color pixel data down-converted by said down-conversion circuitry provides video data synchronized with synchronization timing setting data outputted from said second transmission processing circuitry.
15. The circuitry of claim 13 , wherein timing of the camera unit is synchronized with the synchronous timing setting data.
16. The circuitry of claim 13 , wherein the video processing circuitry is connected to the camera unit through fiber cable.
17. The circuitry of claim 13 , wherein the raw color pixel data has 4K horizontal resolution.
18. The circuitry of claim 13 , wherein the pixel sequence of the raw color pixel data is a Bayer pattern.
19. The circuitry of claim 13 , further comprising: a first recording unit configured to record the raw color pixel data; and a second recording unit configured to record the video data.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
May 30, 2014
October 27, 2015
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