Substrate, chip package and method for manufacturing substrate

1. A method for manufacturing a substrate, comprising: providing a first supporting plate and two release films, the two release films being adhered on opposite sides of the first supporting plate being provided; forming a first wiring layer on each of the two release films; forming a first dielectric layer and a second wiring layer on each first wiring layer; defining a plurality of first conductive via-holes in the first dielectric layer, the first conductive via-holes electrically connecting the first wiring layer and the second wiring layer; defining a first penetrating room in the two first wiring layers, the first dielectric layer, and the second wiring layer; peeling the first wiring layer, the first dielectric layer, and the second wiring layer off from the first supporting plate to obtain the first wiring substrate; providing a second wiring substrate the second wiring substrate comprising a plurality of second connecting pads; and providing an adhesive sheet, the adhesive sheet defining a plurality of through holes and a second penetrating room, the through holes filled with a conducting material, the second penetrating room penetrating two opposite sides of the adhesive sheet; and orderly pressing the adhesive sheet and the first wiring substrate on the second wiring substrate, with the conducting material connected to the first connecting pads and the second connecting pads and the first penetrating room of the first wiring substrate and the second penetrating room of the adhesive sheet cooperatively forming a receiving recess.

2. The method of claim 1 , wherein the first connecting pads are formed in the second wiring layer.

3. The method of claim 1 , wherein providing the second wiring substrate comprises: providing a second supporting plate and two release films, the two release films adhered on two opposite sides of the second supporting plate; orderly forming a third wiring layer, a second dielectric layer, a fourth wiring layer, a third dielectric layer, and a fifth wiring layer on each release film; defining a plurality of second conductive via-holes in the second dielectric layer and the third dielectric layer, the second conductive via-holes in the second dielectric layer electrically connected between the third wiring layer and the fourth wiring layer, the second conductive via-holes in the third dielectric layer electrically connected between the fourth wiring layer and the fifth wiring layer; peeling the third wiring layer, the second dielectric layer, the fourth wiring layer, the third dielectric layer, and the fifth wiring layer off from the second supporting plate to obtain the second wiring substrate.

4. The method of claim 3 , wherein a solder masking layer is formed on the fifth wiring layer, the fifth wiring layer exposing from the solder masking layer serve as solder pads.

5. The method of claim 4 , wherein the first connecting pads surround the first penetrating room, and the through holes surround the second penetrating room.

6. A method for manufacturing a chip substrate, comprising: providing a first supporting plate and two release films, the two release films being adhered on opposite sides of the first supporting plate being provided; forming a first wiring layer on each of the two release films; forming a first dielectric layer and a second wiring layer on each first wiring layer; defining a plurality of first conductive via-holes in the first dielectric layer, the first conductive via-holes electrically connecting the first wiring layer and the second wiring layer; defining a first penetrating room in the two first wiring layers, the first dielectric layer, and the second wiring layer; peeling the first wiring layer, the first dielectric layer, and the second wiring layer off from the first supporting plate to obtain the first wiring substrate; providing a second wiring substrate, the second wiring substrate comprising a plurality of second connecting pads; and providing an adhesive sheet, the adhesive sheet comprising a plurality of through holes and a second penetrating room, the through holes filled with a conducting material, the second penetrating room penetrating two opposite sides of the adhesive sheet; orderly pressing the adhesive sheet and the first wiring substrate on the second wiring substrate, with the conducting material connected to the first connecting pads and the second connecting pads and the first penetrating room of the first wiring substrate and the second penetrating room of the adhesive sheet cooperatively forming a receiving recess; and placing a chip in the receiving recess, with the chip electrically connected to the second wiring substrate.

7. The method of claim 6 , wherein parts of the second wiring layer of the second wiring substrate exposing from the receiving recess sever as first soldering pads, and the chip is electrically connected to the first soldering pads.

8. The method of claim 6 , wherein an adhering glue is filled in the receiving recess, and is adhered between the chip and the second wiring substrate.