A III-N device is described with a III-N layer, an electrode thereon, a passivation layer adjacent the III-N layer and electrode, a thick insulating layer adjacent the passivation layer and electrode, a high thermal conductivity carrier capable of transferring substantial heat away from the III-N device, and a bonding layer between the thick insulating layer and the carrier. The bonding layer attaches the thick insulating layer to the carrier. The thick insulating layer can have a precisely controlled thickness and be thermally conductive.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A III-N device, comprising: a III-N layer having an electrode thereon; a passivation layer adjacent the III-N layer and the electrode; an insulating layer adjacent the passivation layer and the electrode; a second dielectric insulating layer between the insulating layer and the passivation layer; a high thermal conductivity carrier capable of transferring substantial heat away from the III-N device; and a bonding layer between the insulating layer and the high thermal conductivity carrier, the bonding layer attaching the insulating layer to the carrier.
2. The III-N device of claim 1 , further comprising a substrate adjacent the III-N layer.
3. The III-N device of claim 2 , wherein the substrate is selected from the group consisting of silicon, silicon carbide, sapphire and aluminum nitride.
4. The III-N device of claim 2 , further comprising a nucleation layer between the substrate and the III-N layer.
5. The III-N device of claim 4 , further comprising a stress management layer between the nucleation layer and the III-N layer.
6. The III-N device of claim 1 , wherein the second dielectric insulating layer is selected from the group consisting of silicon nitride, aluminum nitride, silicon oxide, alumina, a polymeric dielectric, and an organic dielectric.
7. The III-N device of claim 1 , wherein the second dielectric insulating layer is 0.5-5 microns thick.
8. The III-N device of claim 1 , wherein the insulating layer is about 1-50 microns thick.
9. The III-N device of claim 1 , wherein the thermal conductivity of the second dielectric insulating layer is less than the thermal conductivity of the insulating layer.
10. A III-N device, comprising: a III-N layer having an electrode thereon; a passivation layer adjacent the III-N layer and the electrode; an insulating layer adjacent the passivation layer and the electrode; a high thermal conductivity carrier capable of transferring substantial heat away from the III-N device; a bonding layer between the insulating layer and the high thermal conductivity carrier, the bonding layer attaching the insulating layer to the carrier; and a second passivation layer on an opposite side of the III-N layer from the electrode, the second passivation layer contacting the III-N layer.
11. The III-N device of claim 10 , wherein the insulating layer is selected from the group consisting of silicon nitride, aluminum nitride, silicon oxide, alumina, a polymeric dielectric, and an organic dielectric.
12. The III-N device of claim 10 , wherein the insulating layer is polyimide, benzocyclobutene (BCB), SUB, or a combination of these dielectrics.
13. The III-N device of claim 10 , wherein the bonding layer is thermally conductive.
14. The III-N device of claim 10 , wherein the bonding layer is selected from the group consisting of solder and dielectric glue.
15. The III-N device of claim 10 , wherein the passivation layer is selected from the group consisting of silicon nitride, aluminum nitride, silicon dioxide, alumina, a polymeric dielectric, and an organic dielectric.
16. The III-N device of claim 10 , wherein the passivation layer and the insulating layer have substantially the same composition.
17. The III-N device of claim 10 , wherein the high thermal conductivity carrier is at least 100 microns thick.
18. The III-N device of claim 10 , wherein the electrode is a gate and the device is a transistor.
19. The III-N device of claim 18 , further comprising a source electrode, a drain electrode, and a channel in the III-N layer, wherein the source electrode and the drain electrode contact the channel.
20. The III-N device of claim 10 , wherein the III-N layer comprises a channel layer and a barrier layer.
21. The III-N device of claim 10 , wherein the second passivation layer contacts a surface of the III-N layer from which a substrate was removed.
22. A method of making a III-N device comprising: providing a first structure on a substrate, the first structure comprising a III-N semiconductor layer having an electrode thereon, a passivation layer adjacent the III-N semiconductor layer and the electrode, an insulating layer adjacent the passivation layer and the electrode, a high thermal conductivity carrier capable of transferring substantial heat away from the III-N device, and a bonding layer between the insulating layer and the high thermal conductivity carrier, the bonding layer attaching the insulating layer to the high thermal conductivity carrier; after providing the first structure on the substrate, removing the substrate to expose a surface of the III-N semiconductor layer; and forming a second passivation layer on the exposed surface of the III-N semiconductor layer.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
October 23, 2014
December 29, 2015
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