Patentable/Patents/US-9224716
US-9224716

Method for non-planar chip assembly

PublishedDecember 29, 2015
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

Methods and apparatuses for assembly of a non-planar device based on curved chips are described. Slots may be created as longitudinal openings in the chips to reduce bending stresses to increase allowable degrees of deformation of the chips. The chips may be deformed to a desired deformation within the allowable degrees of deformation via the slots. Holding constraints may be provided on at least a portion of the chips to allow the chips to remain curved according the desired deformation.

Patent Claims
5 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. An assembly method for three dimensionally curved chips including a first chip and a second chip, the method comprising: deforming the first chip to a desired deformation; deforming the second chip to conform to the desired deformation, wherein the first chip and the second chip are separately deformed; bonding, after the first chip and the second chip were separately deformed, the deformed first and second chips with each other to provide mutual holding constraints between the first and second chips to allow the first and second chips to remain curved in the desired deformation.

2

2. The method of claim 1 , wherein the first chips include a plurality of first pads, wherein the second chips include a plurality of second pads corresponding to the first pads of the first chip, and wherein bonding the deformed first and second chips comprises: aligning the first pads and the second pads between the deformed first and second chips; and applying pressure between the aligned first and second chips within a range of controlled elevated temperatures to joint the first and second pads.

3

3. The method of claim 2 , wherein the jointed first and second pads comprise electrical conducting material, wherein the first and second chips are separated via air gaps outside the jointed first and second pads, and wherein the assembly method further comprising: backfilling the air gaps with thermal conducting material to allow heat dissipation between the first and second chips through the thermal conduction material.

4

4. The method of claim 3 , further comprising: passivating the jointed first and second pads to insulate the conducting material from corrosion.

5

5. The method of claim 2 , wherein the first chips include a first slot to allow the deforming the first chips, wherein the second chips include a second slot to allow the deforming the second chips, and wherein the alignment causes the first slot and the second slot to be positioned across each other in a substantially perpendicular manner.

Classification Codes (CPC)

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Patent Metadata

Filing Date

November 19, 2013

Publication Date

December 29, 2015

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Cite as: Patentable. “Method for non-planar chip assembly” (US-9224716). https://patentable.app/patents/US-9224716

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