A system for mapping and translating address information in a network is provided. The system includes a client-side address translator (120) and a server-side address translator (140). The client-side address translator (120) is configured to receive a data packet from a client (110). The data packet includes a first destination address representing the real destination address. The client-side address translator (120) maps the first destination address to another address using a mapping algorithm and transmits the data packet with the via the network (160). The server-side address translator (140) receives the data packet, translates the mapped address information back to the real destination address and forwards the data packet using the real destination address.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method comprising: translating, in a first address translator, a first destination address of a data packet received over a network from a client to a second destination address of said data packet; and transmitting, from said first address translator over said network, said data packet with said second destination address included in said data packet, to a second address translator having said second destination address.
2. The method of claim 1 , further comprising: translating, in said second address translator, said second destination address back to said first destination address.
3. The method of claim 2 , further comprising: transmitting, over said network, said data packet from said second address translator to a server having said first destination address.
4. A system, comprising: a memory configured to store a mapping algorithm; and a processor configured to: receive in a first address translator a data packet with a first destination address included in said data packet, change said first destination address to a second destination address in said first address translator using said mapping algorithm, and transmit said data packet with said second destination address included in said data packet from said first address translator to a second address translator having said second destination address.
5. The system of claim 4 wherein said processor is further configured to: translate said second destination address back to said first destination address in said second address translator, and forward said data packet from said second address translator to a server having said first destination address.
6. A tangible computer-readable hardware medium having stored thereon a plurality of instructions; certain of which when executed by a processor cause said processor to: receive in a first address translator having a first address a data packet with a first destination address included in said data packet, said first destination address being different from said first address; change said first destination address to a second destination address in said first address translator using, a mapping algorithm; and transmit said data packet with said second destination address included in said data packet from said first address translator to a second address translator, said second address translator having said second destination address.
7. The tangible computer-readable hardware medium of claim 6 including instructions for causing said processor to: translate said second destination address back to said first destination address in said second address translator; and forward said data packet from said second address translator to a server having said first destination address.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
July 8, 2010
January 12, 2016
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