A backplane for a display device and the display device are disclosed. In one aspect, the backplane includes a substrate, an active layer formed over the substrate including a channel region, a source region contacting a first side of the channel region, and a drain region contacting a second side of the channel region. The backplane further includes a gate electrode formed adjacent to the channel region, a source electrode electrically connected to the source region, and a drain electrode electrically connected to the drain region. The active layer includes a plurality of heat radiation pins that extend in a direction of the thickness of the active layer.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A backplane for a display device, the backplane comprising: a substrate; an active layer formed over the substrate, wherein the active layer comprises i) a channel region including first and second sides opposing each other, ii) a source region contacting the first side of the channel region, and iii) a drain region contacting the second side of the channel region; a gate electrode formed adjacent to the channel region; a source electrode electrically connected to the source region; and a drain electrode electrically connected to the drain region, wherein the active layer comprises a plurality of heat radiation pins, and wherein the heat radiation pins extend in a direction of the thickness of the active layer.
2. The backplane of claim 1 , wherein the gate electrode is formed over the channel region, and wherein the direction extends downwardly from the gate electrode.
3. The backplane of claim 1 , further comprising a first insulation layer formed between the substrate and the active layer.
4. The backplane of claim 3 , wherein the length of each of the heat radiation pins is less than the thickness of the first insulation layer.
5. The backplane of claim 1 , wherein the heat radiation pins and the channel region are formed of the same material.
6. The backplane of claim 1 , wherein the heat radiation pins are formed in the channel region.
7. The backplane of claim 1 , wherein the heat radiation pins are formed along an edge of the channel region.
8. The backplane of claim 1 , wherein the heat radiation pins are formed of a material the same as a material for forming the source region and/or the drain region.
9. The backplane of claim 1 , wherein the heat radiation pins are formed in the source region and/or the drain region.
10. The backplane of claim 1 , wherein the heat radiation pins are formed at least partially of poly-silicon.
11. A display device, comprising: a substrate; a thin film transistor (TFT) formed over the substrate; and a display unit electrically connected to the TFT, wherein the TFT comprises i) an active layer comprising a channel region including first and second sides opposing each other, a source region contacting the first side of the channel region, and a drain region contacting the second side of the channel region, wherein the active layer comprises a plurality of heat radiation pins extending in a direction of the thickness of the active layer, ii) a gate insulation layer covering the active layer, iii) a gate electrode formed over the gate insulation layer, iv) a source electrode electrically connected to the source region, and v) a drain electrode electrically connected to the drain region.
12. The display device of claim 11 , further comprising a buffer layer formed between the substrate and the active layer.
13. The display device of claim 12 , wherein the direction of the heat radiation pins extends downwardly from the active layer to the substrate.
14. The display device of claim 12 , wherein the buffer layer comprises a plurality of grooves, and wherein the heat radiation pins are respectively formed in the grooves.
15. The display device of claim 14 , wherein the length of each of the heat radiation pins is less than the thickness of the buffer layer.
16. The display device of claim 11 , wherein the heat radiation pins are formed in the channel region.
17. The display device of claim 11 , wherein the heat radiation pins are formed along an edge of the channel region.
18. The display device of claim 11 , wherein the heat radiation pins are formed in one or more of the source region and the drain region.
19. The display device of claim 11 , further comprising: a pixel electrode electrically connected to one or more of the source electrode and the drain electrode; an intermediate layer formed over the pixel electrode, wherein the intermediate layer comprises an organic emission layer; and an opposite electrode formed over the intermediate layer.
20. The display device of claim 11 , further comprising: a first pixel electrode electrically connected to the source electrode and/or the drain electrode; a liquid crystal layer formed over the first pixel electrode; and a second pixel electrode formed over the liquid crystal layer, wherein the second pixel electrode faces the first pixel electrode.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
March 18, 2014
February 9, 2016
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