An imaging apparatus includes: a plurality of pixels each of which includes a conversion element and a first transistor of which one of a source and a drain is connected to the conversion element; and a second transistor which is shared by the plurality of pixels and has a gate connected respectively to the other of the source and the drain of the first transistor of each of the plurality of pixels. At least one among the gate, a source, a drain and a channel portion of the second transistor is formed to be extended over the plurality of pixels, and the conversion element is arranged over the first and second transistors.
Legal claims defining the scope of protection, as filed with the USPTO.
1. An imaging apparatus comprising: a plurality of pixels, each including a conversion element and a first transistor, wherein one of a source and a drain of the first transistor is connected to the conversion element; and a second transistor being shared by the plurality of pixels and having a gate connected respectively to the other of the source and the drain of the first transistor of each of the plurality of pixels, wherein at least one among the gate, a source, a drain and a channel portion of the second transistor is formed to be extended over the plurality of pixels, and the conversion element is arranged over the first and second transistors.
2. The imaging apparatus according to claim 1 , wherein the second transistor is partially removed at a part of the channel portion over which the conversion element is not arranged.
3. The imaging apparatus according to claim 2 , wherein the part removed is positioned at an intersection between a driving line of the first transistor and the second transistor.
4. The imaging apparatus according to claim 2 , wherein a metal layer is formed at a position of the channel portion of the second transistor over which the conversion element is not arranged.
5. The imaging apparatus according to claim 1 , wherein the second transistor is partially removed at a part of the source and/or the drain over which the conversion element is not arranged.
6. The imaging apparatus according to claim 5 , wherein the part removed is positioned at an intersection between a driving line of the first transistor and the second transistor.
7. The imaging apparatus according to claim 1 , wherein the first transistor and the second transistor have a top gate structure formed using a poly-silicon.
8. The imaging apparatus according to claim 1 , wherein the first transistor and the second transistor have a bottom gate structure formed using amorphous silicon.
9. A radiation imaging system comprising: an imaging apparatus according to claim 1 ; and a signal processing unit for processing a signal outputted from the imaging apparatus.
10. The imaging system according to claim 9 , further comprising a recording unit for recording a signal outputted from the signal processing unit; a radiation source generating an electro-magnetic wave; a display unit for displaying based on the signal outputted from the signal processing unit; and a transfer processing unit for transferring a signal outputted from the signal processing unit.
11. A manufacturing method of an imaging apparatus comprising: a plurality of pixels, each including a conversion element and a first transistor, wherein one of a source and a drain of the first transistor is connected to the conversion element, wherein the method comprising steps of: forming a second transistor being shared by the plurality of pixels and having a gate connected respectively to the other of the source and the drain of the first transistor of each of the plurality of pixels, such that at least one among the gate, a source, a drain and a channel portion of the second transistor is extended over the plurality of pixels; and forming the conversion element over the first and second transistors.
12. An imaging apparatus comprising: a plurality of pixels, each including a conversion element and a first transistor, said first transistor of each pixel having a source and a drain, wherein one of the source and the drain of the first transistor of each pixel is connected to the conversion element of that pixel; and a second transistor being shared by the plurality of pixels and having a source, a drain and a channel portion, and the second transistor having a gate connected to the other of the source and the drain of the first transistor of each pixel of the plurality of pixels, wherein at least one among the gate, the source, the drain and the channel portion of the second transistor extends over the plurality of pixels, and the conversion element of each pixel is arranged over the first transistor of that pixel and over the second transistor.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
November 21, 2012
February 23, 2016
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